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DM54125J PDF预览

DM54125J

更新时间: 2024-11-14 22:54:35
品牌 Logo 应用领域
美国国家半导体 - NSC 逻辑集成电路驱动
页数 文件大小 规格书
4页 101K
描述
Quad TRI-STATE Buffers

DM54125J 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP14,.3Reach Compliance Code:unknown
风险等级:5.54控制类型:ENABLE LOW
系列:TTL/H/LJESD-30 代码:R-GDIP-T14
JESD-609代码:e0长度:19.43 mm
逻辑集成电路类型:BUS DRIVER最大I(ol):0.016 A
位数:1功能数量:4
端口数量:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):54 mA
Prop。Delay @ Nom-Sup:18 ns传播延迟(tpd):18 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

DM54125J 数据手册

 浏览型号DM54125J的Datasheet PDF文件第2页浏览型号DM54125J的Datasheet PDF文件第3页浏览型号DM54125J的Datasheet PDF文件第4页 
June 1989  
54125/DM54125/DM74125  
Quad TRI-STATE Buffers  
É
General Description  
This device contains four independent gates each of which  
performs a non-inverting buffer function. The outputs have  
the TRI-STATE feature. When enabled, the outputs exhibit  
the low impedance characteristics of a standard TTL output  
with additional drive capability at the high Logic level to per-  
mit the driving of bus lines without external pull-up resistors.  
When disabled, both the output transistors are turned off  
presenting a high-impedance state to the bus line. Thus the  
output will act neither as a significant load nor as a driver.  
To minimize the possibility that two outputs will attempt to  
take a common bus to opposite logic levels, the disable time  
is shorter than the enable time of the outputs.  
Features  
Y
Alternate Military/Aerospace device (54125) is avail-  
able. Contact a National Semiconductor Sales Office/  
Distributor for specifications.  
Connection Diagram  
Dual-In-Line Package  
TL/F/6540–1  
Order Number 54125DMQB, 54125FMQB, DM54125J, DM54125W or DM74125N  
See NS Package Number J14A, N14A or W14B  
Function Table  
e
Y
C
A
Inputs  
Output  
Y
A
L
H
X
L
L
L
H
H
Hi-Z  
e
e
e
H
L
High Logic Level  
Low Logic Level  
X
Either Low or High Logic Level  
e
Hi-Z  
TRI-STATE (Outputs are disabled)  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/6540  
RRD-B30M105/Printed in U. S. A.  

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