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DM54125

更新时间: 2024-11-23 22:54:35
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
4页 101K
描述
Quad TRI-STATE Buffers

DM54125 数据手册

 浏览型号DM54125的Datasheet PDF文件第2页浏览型号DM54125的Datasheet PDF文件第3页浏览型号DM54125的Datasheet PDF文件第4页 
June 1989  
54125/DM54125/DM74125  
Quad TRI-STATE Buffers  
É
General Description  
This device contains four independent gates each of which  
performs a non-inverting buffer function. The outputs have  
the TRI-STATE feature. When enabled, the outputs exhibit  
the low impedance characteristics of a standard TTL output  
with additional drive capability at the high Logic level to per-  
mit the driving of bus lines without external pull-up resistors.  
When disabled, both the output transistors are turned off  
presenting a high-impedance state to the bus line. Thus the  
output will act neither as a significant load nor as a driver.  
To minimize the possibility that two outputs will attempt to  
take a common bus to opposite logic levels, the disable time  
is shorter than the enable time of the outputs.  
Features  
Y
Alternate Military/Aerospace device (54125) is avail-  
able. Contact a National Semiconductor Sales Office/  
Distributor for specifications.  
Connection Diagram  
Dual-In-Line Package  
TL/F/6540–1  
Order Number 54125DMQB, 54125FMQB, DM54125J, DM54125W or DM74125N  
See NS Package Number J14A, N14A or W14B  
Function Table  
e
Y
C
A
Inputs  
Output  
Y
A
L
H
X
L
L
L
H
H
Hi-Z  
e
e
e
H
L
High Logic Level  
Low Logic Level  
X
Either Low or High Logic Level  
e
Hi-Z  
TRI-STATE (Outputs are disabled)  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/6540  
RRD-B30M105/Printed in U. S. A.  

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