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DM5401

更新时间： 2024-11-13 22:29:43

品牌	Logo	应用领域
美国国家半导体 - NSC		栅
页数	文件大小	规格书
4页	100K
描述
Quad 2-Input NAND Gates with Open-Collector Outputs

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数据手册

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DM5401 数据手册

June 1989

DM5401/DM7401 Quad 2-Input NAND Gates

with Open-Collector Outputs

General Description

Pull-Up Resistor Equations

This device contains four independent gates each of which

performs the logic NAND function. The open-collector out-

puts require external pull-up resistors for proper logical op-

eration.

(Min)

MAX

)

(Max)

MIN

(I )

total maximum output high current for all

outputs tied to pull-up resistor

Where: N (I

)

total maximum input high current for all

inputs tied to pull-up resistor

)

total maximum input low current for all

Connection Diagram

Dual-In-Line Package

TL/F/6614–1

Order Number DM5401J, DM5401W or DM7401N

See NS Package Number J14A, N14A or W14B

Function Table

Inputs

Output

High Logic Level

Low Logic Level

1995 National Semiconductor Corporation

TL/F/6614

RRD-B30M105/Printed in U. S. A.

12 3 4

中文翻译

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