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DG534ADJ

更新时间： 2024-09-18 22:40:35
品牌 Logo 应用领域
威世 - VISHAY 解复用器
页数 文件大小 规格书
16页 143K
描述
4-/8-Channel Wideband Video Multiplexers

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中文翻译

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DG534ADJ 技术参数

是否无铅： 含铅生命周期：Transferred
零件包装代码：DIP包装说明：,
针数：20Reach Compliance Code：unknown
风险等级：5.64Is Samacsys：N
Base Number Matches：1

DG534ADJ 数据手册

 浏览型号DG534ADJ的Datasheet PDF文件第2页浏览型号DG534ADJ的Datasheet PDF文件第3页浏览型号DG534ADJ的Datasheet PDF文件第4页浏览型号DG534ADJ的Datasheet PDF文件第5页浏览型号DG534ADJ的Datasheet PDF文件第6页浏览型号DG534ADJ的Datasheet PDF文件第7页 
DG534A/538A  
Vishay Siliconix  
4-/8-Channel Wideband Video Multiplexers  
FEATURES  
BENEFITS  
APPLICATIONS  
D Wide Bandwidth: 500 MHz  
D Improved System Bandwidth  
D Improved Channel Off-Isolation  
D Wideband Signal Routing and  
Multiplexing  
D Very Low Crosstalk: –97 dB @ 5 MHz  
D Video Switchers  
D ATE Systems  
D On-Board TTL-Compatible Latches with D Simplified Logic Interfacing  
Readback  
D High-Speed Readback  
D Optional Negative Supply  
D Infrared Imaging  
D Allows Bipolar Signal Swings  
D Reduced Insertion Loss  
D Ultrasound Imaging  
D Low rDS(on): 45  
ꢀ
D Single-Ended or Differential Operation  
D Latch-up Proof  
D Allows Differential Signal Switching  
DESCRIPTION  
The DG534A is a digitally selectable 4-channel or dual  
2-channel multiplexer. The DG538A is an 8-channel or dual  
4-channel multiplexer. On-chip TTL-compatible address  
decoding logic and latches with data readback are included to  
simplify the interface to a microprocessor data bus. The low  
on-resistance and low capacitance of the these devices make  
them ideal for wideband data multiplexing and video and audio  
signal routing in channel selectors and crosspoint arrays. An  
optional negative supply pin allows the handling of bipolar  
signals without dc biasing.  
The DG534A/DG538A are built on a D/CMOS process that  
combines n-channel DMOS switching FETs with low-power  
CMOS control logic, drivers and latches. The low-capacitance  
DMOS FETs are connected in a “T” configuration to achieve  
extremely high levels of off isolation. Crosstalk is reduced to  
–97 dB at 5 MHz by including a ground line between adjacent  
signal paths. An epitaxial layer prevents latch-up.  
For more information refer to Vishay Siliconix applications  
note AN502.  
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION  
DG534ADJ  
Dual-In-Line  
DG534ADN  
PLCC  
GND  
NC  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
D
A
D
B
3
2
1
20 19  
V+  
V–  
3
S
4
5
6
7
8
18  
17  
16  
15  
14  
S
B1  
A1  
S
A1  
S
B1  
4
GND  
GND  
GND  
GND  
5
S
A2  
S
B2  
V
L
S
A2  
S
B2  
6
4/2  
RS  
4/2  
RS  
V
L
7
NC  
Latch/Drivers  
I/O  
EN  
8
Latches/Drivers  
Top View  
WR  
9
9
10 11 12 13  
A
1
A
0
10  
Top View  
Document Number: 70069  
S-05734—Rev. G, 29-Jan-02  
www.vishay.com  
1
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