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DG527AK/883B PDF预览

DG527AK/883B

更新时间: 2024-11-12 14:49:19
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
16页 313K
描述
8-CHANNEL, DIFFERENTIAL MULTIPLEXER, CDIP28, CERDIP-28

DG527AK/883B 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:CERDIP-28
针数:28Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.29
模拟集成电路 - 其他类型:DIFFERENTIAL MULTIPLEXERJESD-30 代码:R-GDIP-T28
JESD-609代码:e0标称负供电电压 (Vsup):-15 V
信道数量:8功能数量:1
端子数量:28标称断态隔离度:55 dB
通态电阻匹配规范:16.2 Ω最大通态电阻 (Ron):400 Ω
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP28,.6封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:+-15 V认证状态:Not Qualified
筛选级别:MIL-STD-883 Class B座面最大高度:5.92 mm
最大信号电流:0.02 A子类别:Multiplexer or Switches
最大供电电流 (Isup):4.5 mA标称供电电压 (Vsup):15 V
表面贴装:NO最长断开时间:1000 ns
最长接通时间:1500 ns切换:BREAK-BEFORE-MAKE
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:15.24 mm
Base Number Matches:1

DG527AK/883B 数据手册

 浏览型号DG527AK/883B的Datasheet PDF文件第2页浏览型号DG527AK/883B的Datasheet PDF文件第3页浏览型号DG527AK/883B的Datasheet PDF文件第4页浏览型号DG527AK/883B的Datasheet PDF文件第5页浏览型号DG527AK/883B的Datasheet PDF文件第6页浏览型号DG527AK/883B的Datasheet PDF文件第7页 
DG526, DG527,  
DG528, DG529  
Semiconductor  
Analog CMOS  
April 1999  
Latchable Multiplexers  
Features  
Description  
• Direct RESET  
The DG526, DG527, DG528, and DG529 are CMOS  
Monolithic 16-Channel/Dual 4-Channel Analog Multiplexers.  
Each device has on-chip address and control latches to sim-  
plify design in microprocessor based applications. The DG526  
uses 4 address lines to control its 16 channels; the DG527,  
DG528 both use 3 address lines to control their 8 channels;  
and the DG529 uses 2 address lines to control its 4 channels.  
The enable pin is used to enable the address latches during  
the WR pulse. It can be hard wired to the logic supply if one of  
the channels will always be used (except during a reset) or it  
can be tied to address decoding circuitry for memory mapped  
operation. The RS pin is used to clear all latches regardless of  
the state of any other latch or control line. The WR pin is used  
to transfer the state of the address control lines to their  
latches, except during a reset or when EN is low.  
• TTL and CMOS Compatible Address and Enable  
Inputs  
• Maximum Power Supply Rating . . . . . . . . . . . . . . . .44V  
• Break-Before-Make Switching  
• Alternate Source  
Applications  
• Data Acquisition Systems  
• Communication Systems  
• Automatic Test Equipment  
• Microprocessor Controlled Systemd  
A channel in the ON state conducts signals equally well in  
both directions. In the OFF state each channel blocks volt-  
ages up to the supply rails. The address inputs, WR, RS and  
the enable input are TTL and CMOS compatible over the full  
specified operation temperature range.  
Part Number Information  
PART  
NUMBER  
TEMP.  
RANGE ( C)  
PART  
NUMBER  
TEMP.  
RANGE ( C)  
o
o
PACKAGE  
PKG. NO.  
F28.6  
F28.6  
F28.6  
M28.3  
E28.6  
F28.6  
M28.3  
F28.6  
F28.6  
F28.6  
M28.3  
E28.6  
F28.6  
M28.3  
PACKAGE  
PKG. NO.  
F18.3  
F18.3  
F18.3  
M18.3  
E18.3  
F18.3  
M18.3  
F18.3  
F18.3  
F18.3  
M18.3  
E18.3  
F18.3  
M18.3  
DG526AK  
-55 to 125 28 Ld CERDIP  
-55 to 125 28 Ld CERDIP  
DG528AK  
-55 to 125 18 Ld CERDIP  
-55 to 125 18 Ld CERDIP  
DG526AK/883B  
DG526BK  
DG526BY  
DG526CJ  
DG528AK/883B  
DG528BK  
DG528BY  
DG528CJ  
-25 to 85  
-25 to 85  
0 to 70  
28 Ld CERDIP  
28 Ld SOIC  
28 Ld PDIP  
-25 to 85  
-25 to 85  
0 to 70  
18 Ld CERDIP  
18 Ld SOIC  
18 Ld PDIP  
DG526CK  
DG526CY  
DG527AK  
DG527AK/883B  
DG527BK  
DG527BY  
DG527CJ  
0 to 70  
28 Ld CERDIP  
28 Ld SOIC  
DG528CK  
DG528CY  
DG529AK  
DG529AK/883B  
DG529BK  
DG529BY  
DG529CJ  
0 to 70  
18 Ld CERDIP  
18 Ld SOIC  
0 to 70  
0 to 70  
-55 to 125 28 Ld CERDIP  
-55 to 125 28 Ld CERDIP  
-55 to 125 18 Ld CERDIP  
-55 to 125 18 Ld CERDIP  
-25 to 85  
-25 to 85  
0 to 70  
28 Ld CERDIP  
28 Ld SOIC  
28 Ld PDIP  
-25 to 85  
-25 to 85  
0 to 70  
18 Ld CERDIP  
18 Ld SOIC  
18 Ld PDIP  
DG527CK  
DG527CY  
0 to 70  
28 Ld CERDIP  
28 Ld SOIC  
DG529CK  
DG529CY  
0 to 70  
18 Ld CERDIP  
18 Ld SOIC  
0 to 70  
0 to 70  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 3139.2  
Copyright © Harris Corporation 1999  
12-1  

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