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DG429N PDF预览

DG429N

更新时间: 2024-11-29 13:07:19
品牌 Logo 应用领域
威世 - VISHAY 复用器
页数 文件大小 规格书
12页 151K
描述
IC DUAL 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PQCC, PLASTIC, LCC, Multiplexer or Switch

DG429N 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:LCC
包装说明:QCCJ,Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.71
模拟集成电路 - 其他类型:DIFFERENTIAL MULTIPLEXERJESD-30 代码:S-PQCC-J
JESD-609代码:e0信道数量:4
功能数量:2最大通态电阻 (Ron):100 Ω
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):240认证状态:Not Qualified
表面贴装:YES最长断开时间:250 ns
最长接通时间:250 ns端子面层:TIN LEAD
端子形式:J BEND端子位置:QUAD
处于峰值回流温度下的最长时间:30Base Number Matches:1

DG429N 数据手册

 浏览型号DG429N的Datasheet PDF文件第2页浏览型号DG429N的Datasheet PDF文件第3页浏览型号DG429N的Datasheet PDF文件第4页浏览型号DG429N的Datasheet PDF文件第5页浏览型号DG429N的Datasheet PDF文件第6页浏览型号DG429N的Datasheet PDF文件第7页 
DG428/429  
Vishay Siliconix  
Single 8-Ch/Differential 4-Ch Latchable Analog Multiplexers  
FEATURES  
BENEFITS  
APPLICATIONS  
D Low rDS(on): 55 W  
D Low Charge Injection: 1 pC  
D Improved System Accuracy  
D Microprocessor Bus Compatible  
D Easily Interfaced  
D Data Acquisition Systems  
D Automatic Test Equipment  
D Avionics and Military Systems  
D Communication Systems  
D On-Board TTL Compatible  
Address Latches  
D Reduced Crosstalk  
D High Throughput  
D High Speed—tTRANS: 160 ns  
D Break-Before-Make  
D Microprocessor-Controlled  
Analog Systems  
D Improved Reliability  
D Low Power Consumption: 0.3 mW  
D Medical Instrumentation  
DESCRIPTION  
The DG428/DG429 analog multiplexers have on-chip address  
and control latches to simplify design in microprocessor based  
applications. Break-before-make switching action protects  
against momentary crosstalk of adjacent input signals.  
several devices. All control inputs, address (Ax) and enable  
(EN) are TTL compatible over the full specified operating  
temperature range.  
The silicon-gate CMOS process enables operation over a  
wide range of supply voltages. The absolute maximumvoltage  
rating is extended to 44 V. Additionally, single supply operation  
is also allowed and an epitaxial layer prevents latchup.  
The DG428 selects one of eight single-ended inputs to a  
common output, while the DG429 selects one of four  
differential inputs to a common differential output.  
An on channel conducts current equally well in both directions.  
In the off state each channel blocks voltages up to the power  
supply rails. An enable (EN) function allows the user to reset  
the multiplexer/demultiplexer to all switches off for stacking  
On-board TTL-compatible address latches simplify the digital  
interface design and reduce board space in bus-controlled  
systems such as data acquisition systems, process controls,  
avionics, and ATE.  
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION  
DG428  
DG428  
Dual-In-Line  
PLCC  
WR  
RS  
1
2
3
4
5
6
7
8
9
18  
17  
16  
15  
14  
13  
12  
11  
10  
3
2
1
20 19  
A
0
A
1
Latches  
EN  
V–  
A
2
EN  
V–  
4
5
6
7
8
18  
A
2
Latches  
17 GND  
Decoders/Drivers  
Decoders/Drivers  
GND  
V+  
V+  
S
1
S
2
S
3
16  
15  
14  
S
1
S
5
S
2
S
5
S
6
S
3
S
6
9
10 11 12 13  
Top View  
S
4
S
7
D
S
8
Top View  
Document Number: 70063  
S-52433—Rev. J, 06-Sep-99  
www.vishay.com S FaxBack 408-970-5600  
5-1  

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