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DG418DJ-E3 PDF预览

DG418DJ-E3

更新时间: 2024-11-04 06:53:07
品牌 Logo 应用领域
威世 - VISHAY 复用器开关复用器或开关信号电路光电二极管PC
页数 文件大小 规格书
11页 148K
描述
Precision CMOS Analog Switches

DG418DJ-E3 技术参数

是否无铅:不含铅生命周期:Active
零件包装代码:DIP包装说明:DIP, DIP8,.3
针数:8Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:1.28
Samacsys Confidence:3Samacsys Status:Released
Samacsys PartID:399522Samacsys Pin Count:8
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Dual-In-Line Packages
Samacsys Footprint Name:8-PDIPSamacsys Released Date:2020-01-09 16:42:31
Is Samacsys:N模拟集成电路 - 其他类型:SPST
JESD-30 代码:R-PDIP-T8JESD-609代码:e3
长度:9.97 mm湿度敏感等级:1
标称负供电电压 (Vsup):-15 V正常位置:NO
信道数量:1功能数量:1
端子数量:8最大通态电阻 (Ron):35 Ω
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP8,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):260
电源:5,12/+-15 V认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Multiplexer or Switches
标称供电电压 (Vsup):15 V表面贴装:NO
最长断开时间:210 ns最长接通时间:250 ns
切换:BREAK-BEFORE-MAKE技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.62 mmBase Number Matches:1

DG418DJ-E3 数据手册

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DG417/418/419  
Vishay Siliconix  
Precision CMOS Analog Switches  
DESCRIPTION  
FEATURES  
The DG417/418/419 monolithic CMOS analog switches  
were designed to provide high performance switching of  
analog signals. Combining low power, low leakages, high  
speed, low on-resistance and small physical size, the  
DG417 series is ideally suited for portable and battery  
powered industrial and military applications requiring high  
performance and efficient use of board space.  
15 V Analog Signal Range  
Pb-free  
On-Resistance - rDS(on): 20 Ω  
Available  
Fast Switching Action - tON: 100 ns  
Ultra Low Power Requirements - PD: 35 nW  
TTL and CMOS Compatible  
RoHS*  
COMPLIANT  
MiniDIP and SOIC Packaging  
44 V Supply Max Rating  
BENEFITS  
To achieve high-voltage ratings and superior switching  
performance, the DG417 series is built on Vishay Siliconix’s  
high voltage silicon gate (HVSG) process. Break-before-  
make is guaranteed for the DG419, which is an SPDT  
configuration. An epitaxial layer prevents latchup.  
Wide Dynamic Range  
Low Signal Errors and Distortion  
Break-Before-Make Switching Action  
Simple Interfacing  
Reduced Board Space  
Improved Reliability  
Each switch conducts equally well in both directions when  
on, and blocks up to the power supply level when off.  
APPLICATIONS  
Precision Test Equipment  
Precision Instrumentation  
Battery Powered Systems  
Sample-and-Hold Circuits  
Military Radios  
The DG417 and DG418 respond to opposite control logic  
levels as shown in the Truth Table.  
Guidance and Control Systems  
Hard Disk Drives  
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION  
DG417  
Dual-In-Line and SOIC  
TRUTH TABLE  
Logic  
0
1
DG417  
ON  
OFF  
DG418  
OFF  
ON  
1
2
3
4
8
7
6
5
S
NC  
D
V-  
IN  
GND  
V+  
Logic "0" 0.8 V  
Logic "1" 2.4 V  
V
L
Top View  
DG419  
Dual-In-Line and SOIC  
TRUTH TABLE - DG419  
Logic  
SW1  
SW2  
1
2
3
4
8
7
6
5
D
S
2
0
1
ON  
OFF  
ON  
S
1
V-  
IN  
V
OFF  
GND  
V+  
Logic "0" 0.8 V  
Logic "1" 2.4 V  
L
Top View  
* Pb containing terminations are not RoHS compliant, exemptions may apply  
Document Number: 70051  
S-71241–Rev. F, 25-Jun-07  
www.vishay.com  
1

DG418DJ-E3 替代型号

型号 品牌 替代类型 描述 数据表
ADG417BNZ ADI

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