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DG417BDJ-E3 PDF预览

DG417BDJ-E3

更新时间: 2024-11-23 06:53:07
品牌 Logo 应用领域
威世 - VISHAY 复用器开关复用器或开关信号电路光电二极管
页数 文件大小 规格书
10页 164K
描述
Precision Monolithic Quad SPST CMOS Analog Switches

DG417BDJ-E3 技术参数

是否无铅:不含铅生命周期:Active
零件包装代码:DIP包装说明:DIP, DIP8,.3
针数:8Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.47
Is Samacsys:N其他特性:ALSO OPERATES WITH 12 V NOMINAL SINGLE SUPPLY
模拟集成电路 - 其他类型:SPSTJESD-30 代码:R-PDIP-T8
JESD-609代码:e3长度:9.97 mm
湿度敏感等级:1标称负供电电压 (Vsup):-15 V
正常位置:NC信道数量:1
功能数量:4端子数量:8
标称断态隔离度:82 dB最大通态电阻 (Ron):25 Ω
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP8,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:12/+-15 V认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Multiplexer or Switches
标称供电电压 (Vsup):15 V表面贴装:NO
最长断开时间:80 ns最长接通时间:89 ns
切换:BREAK-BEFORE-MAKE技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

DG417BDJ-E3 数据手册

 浏览型号DG417BDJ-E3的Datasheet PDF文件第2页浏览型号DG417BDJ-E3的Datasheet PDF文件第3页浏览型号DG417BDJ-E3的Datasheet PDF文件第4页浏览型号DG417BDJ-E3的Datasheet PDF文件第5页浏览型号DG417BDJ-E3的Datasheet PDF文件第6页浏览型号DG417BDJ-E3的Datasheet PDF文件第7页 
DG417B/418B/419B  
Vishay Siliconix  
Precision Monolithic Quad SPST CMOS Analog Switches  
DESCRIPTION  
FEATURES  
The DG417B/418B/419B monolithic CMOS analog switches  
were designed to provide high performance switching of  
analog signals. Combining low power, low leakages, high  
speed, low on-resistance and small physical size, the  
DG417B series is ideally suited for portable and battery  
powered industrial and military applications requiring high  
performance and efficient use of board space.  
15 V Analog Signal Range  
Pb-free  
On-Resistance - rDS(on): 15 Ω  
Fast Switching Action - tON: 110 ns  
TTL and CMOS Compatible  
Available  
RoHS*  
COMPLIANT  
MSOP-8 and SOIC-8 Package  
BENEFITS  
Widest Dynamic Range  
To achieve high-voltage ratings and superior switching  
performance, the DG417B series is built on Vishay  
Siliconix’s high voltage silicon gate (HVSG) process.  
Break-before-make is guaranteed for the DG419B, which is  
an SPDT configuration. An epitaxial layer prevents latchup.  
Low Signal Errors and Distortion  
Break-Before-Make Switching Action  
Simple Interfacing  
Reduced Board Space  
Improved Reliability  
Each switch conducts equally well in both directions when  
on, and blocks up to the power supply level when off.  
APPLICATIONS  
Precision Test Equipment  
Precision Instrumentation  
Battery Powered Systems  
Sample-and-Hold Circuits  
Military Radios  
The DG417B and DG418B respond to opposite control logic  
levels as shown in the Truth Table.  
Guidance and Control Systems  
Hard Disk Drivers  
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION  
DG417B  
Dual-In-Line, SOIC-8 and MSOP-8  
1
2
3
4
8
7
6
5
S
NC  
D
TRUTH TABLE  
V-  
IN  
Logic  
DG417B  
DG418B  
OFF  
ON  
GND  
V+  
0
1
ON  
OFF  
V
L
Logic "0" 0.8 V  
Logic "1" 2.4 V  
Top View  
DG419B  
Dual-In-Line, SOIC-8 and MSOP-8  
TRUTH TABLE - DG419B  
1
2
3
4
8
7
6
5
D
S
2
SW1  
SW2  
Logic  
S
V-  
IN  
V
1
GND  
V+  
0
1
ON  
OFF  
ON  
OFF  
L
Logic "0" 0.8 V  
Logic "1" 2.4 V  
Top View  
* Pb containing terminations are not RoHS compliant, exemptions may apply  
Document Number: 72107  
S-71009–Rev. C, 14-May-07  
www.vishay.com  
1

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