DG409LDQ-T1-E3 PDF预览

DG409LDQ-T1-E3

更新时间: 2025-07-19 06:53:07
品牌 Logo 应用领域
威世 - VISHAY 复用器
页数 文件大小 规格书
12页 158K
描述
Precision 8-Ch/Dual 4-Ch Low Voltage Analog Multiplexers

DG409LDQ-T1-E3 数据手册

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DG408L/409L  
Vishay Siliconix  
Precision 8-Ch/Dual 4-Ch Low Voltage Analog Multiplexers  
DESCRIPTION  
FEATURES  
The DG408L/409L are low voltage pin-for-pin compatible  
companion devices to the industry standard DG408/409 with  
improved performance.  
Pin-For-Pin compatibility with DG408/409  
Pb-free  
2.7- to 12 V Single Supply or 3 to ꢀ V  
Dual Supply Operation  
Available  
RoHS*  
Using BiCMOS wafer fabrication technology allows the  
DG408L/409L to operate on single and dual supplies. Single  
supply voltage ranges from 3 to 12 V while dual supply  
operation is recommended with 3 to ꢀ V.  
Lower On-Resistance: rDS(on) - 17 Ω Typ.  
Fast Switching: tON - 38 ns, tOFF - 18 ns  
Break-Before-Make Guaranteed  
Low Leakage: IS(off) - 0.2 nA Max.  
Low Charge Injection: 1 pC  
COMPLIANT  
The DG408L is an 8 Channel single-ended analog  
multiplexer designed to connect one of eight inputs to a  
common output as determined by a 3 bit binary address (A0,  
A1, A2). The DG409L is a dual 4 Channel differential analog  
multiplexer designed to connect one of four differential  
inputs to a common dual output as determined by its 2 bit  
binary address (A0, A1). Break-before-make switching action  
to protect against momentary crosstalk between adjacent  
channels.  
TTL, CMOS, LV Logic (3 V) Compatible  
- 82 dB Off-Isolation at 1 MHz  
2000 V ESD Protection (HBM)  
BENEFITS  
High Accuracy  
Single and Dual Power Rail Capacity  
Wide Operating Voltage Range  
Simple Logic Interface  
The DG408L/409L provides lower on-resistance, faster  
switching time, lower leakage, less power consumption and  
higher off-Isolation than the DG408/409.  
APPLICATIONS  
Data Acquisition Systems  
Battery Operated Equipment  
Portable Test Equipment  
Sample and Hold Circuits  
Communication Systems  
SDSL, DSLAM  
Audio and Video Signal Routing  
FUNCTIONAL BLOCK DIAGRAMS AND PIN CONFIGURATIONS  
DG408L  
DG409L  
Dual-In- Line, SOIC and TSSOP  
Dual-In- Line, SOIC and TSSOP  
A
A
A
A
1
0
1
0
1
2
3
4
5
7
8
1ꢀ  
15  
14  
13  
12  
11  
10  
9
1
2
3
4
5
7
8
1ꢀ  
15  
14  
13  
12  
11  
10  
9
EN  
V-  
A
2
EN  
V-  
GND  
V+  
Decoders/Drivers  
Decoders/Drivers  
GND  
V+  
S
1
S
S
1b  
1a  
2a  
3a  
S
2
S
5
S
S
S
S
2b  
S
3
S
S
3b  
S
4
S
7
S
4b  
4a  
D
S
8
D
D
b
a
Top View  
Top View  
* Pb containing terminations are not RoHS compliant, exemptions may apply  
Document Number: 71342  
S-71241–Rev. E, 25-Jun-07  
www.vishay.com  
1

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