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DG4051A_10 PDF预览

DG4051A_10

更新时间: 2024-11-29 12:20:31
品牌 Logo 应用领域
威世 - VISHAY 复用器光电二极管
页数 文件大小 规格书
16页 221K
描述
8-Channel, Dual 4-Channel, Triple 2-Channel (Triple SPDT) Multiplexers

DG4051A_10 数据手册

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DG4051A, DG4052A, DG4053A  
Vishay Siliconix  
8-Channel, Dual 4-Channel, Triple 2-Channel  
(Triple SPDT) Multiplexers  
DESCRIPTION  
FEATURES  
+ 2.7 V to + 12 V single supply operation  
2.ꢀ V to ꢀ V ꢁual supply operation  
The DG40ꢀ1A, DG40ꢀ2A anꢁ DG40ꢀ3A are high precision  
CMOS analog multiplexers. The DG40ꢀ1A is an 8-channel  
multiplexer, the DG40ꢀ2A is a ꢁual 4-channel multiplexer  
anꢁ the DG40ꢀ3A is a triple 2-channel multiplexer or triple  
SPDT.  
Fully specifieꢁ at + 3 V, + ꢀ V, ꢀ V  
100 maximum on-resistance  
Low voltage, 2.ꢀ V CMOS/TTL compatible  
Low charge injection (< 0.ꢀ pC typ.)  
High - 3 ꢁB banꢁwiꢁth: 330 MHz to 700 MHz  
Low switch capacitance (Cs(off) 3 pF typ.)  
RoHS  
COMPLIANT  
Designeꢁ to operate from a + 2.7 V to + 12 V single supply  
or from a 2.ꢀ V to ꢀ V ꢁual supplies, the DG40ꢀ1A,  
DG40ꢀ2A anꢁ DG40ꢀ3A are fully specifieꢁ at + 3 V, + ꢀ V  
anꢁ ꢀ V. All control logic inputs have guaranteeꢁ 2.0 V  
logic high limit when operating from + ꢀ V or ꢀ V supplies  
anꢁ 1.4 V when operating from a + 3 V supply.  
Excellent isolation anꢁ crosstalk performance (typ. 47 ꢁB at  
100 MHz)  
16 pin SOIC, TSSOP anꢁ miniQFN package (1.8 mm  
x 2.6 mm)  
Channel leakage is typically in the range of 10 pA, anꢁ  
switch charge injection is less than 0.ꢀ pC. Coupleꢁ with very  
low switch capacitance, these ꢁevices are iꢁeal for high  
precision signal switching anꢁ multiplexing.  
Fully specifieꢁ from - 40 °C to + 8ꢀ °C anꢁ - 40 °C to + 12ꢀ °C  
Compliant to RoHS ꢁirective 2002/9ꢀ/EC  
All switches conꢁuct equally well in both ꢁirections, offering  
rail to rail analog signal switching anꢁ can be useꢁ both as  
multiplexers as well as ꢁe-multiplexers.  
APPLICATIONS  
Instruments  
The DG40ꢀ1A, DG40ꢀ2A anꢁ DG40ꢀ3A operating  
temperature is specifieꢁ from - 40 °C to + 12ꢀ °C anꢁ are  
available in 16 pin TSSOP anꢁ the ultra compact 1.8 mm  
x 2.6 mm miniQFN16 packages.  
Healthcare anꢁ meꢁical equipments  
Touch panel  
Automateꢁ test equipment  
Automation anꢁ control  
High precision ꢁata acquisition  
Communication system  
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION  
DG4053A  
DG4051A  
DG4052A  
TSSOP16  
TSSOP16  
TSSOP16  
1
2
3
4
6
X4  
Y0  
Y2  
1
2
3
4
6
1
16  
1ꢀ  
14  
13  
12  
11  
10  
9
V
16  
1ꢀ  
14  
V
CC  
16  
1ꢀ  
14  
13  
12  
11  
V
CC  
CC  
Y1  
Y0  
X6  
2
X2  
X1  
X2  
Y
X
X7  
3
X1  
X
Y
Z1  
Z
X
Y3  
4
6
7
13  
12  
X0  
X3  
X1  
Xꢀ  
Y1  
X0  
X3  
Z0  
X0  
A
ENABLE  
ENABLE  
ENABLE  
A
B
C
11  
10  
9
V
V
EE  
V
EE  
EE  
Logic  
7
7
Logic  
B
C
10  
9
A
B
GND  
8
GND  
8
GND  
8
Top View  
Top View  
Top View  
ENABLE = LO, all switches are controlleꢁ by aꢁꢁr pins.  
ENABLE = HI, all switches are off.  
Document Number: 69828  
S10-1383-Rev. E, 21-Jun-10  
www.vishay.com  
1

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