DG401, DG403
®
Data Sheet
November 20, 2006
FN3284.11
Monolithic CMOS Analog Switches
Features
• ON Resistance (Max). . . . . . . . . . . . . . . . . . . . . . . . . 45Ω
The DG401 and DG403 monolithic CMOS analog switches
have TTL and CMOS compatible digital inputs.
• Low Power Consumption (P ). . . . . . . . . . . . . . . . . . .<35μW
D
These switches feature low analog ON resistance (<45Ω)
• Fast Switching Action
and fast switch time (t <150ns). Low charge injection
simplifies sample and hold applications.
- t
- t
(Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns
ON
ON
(Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ns
OFF
• Low Charge Injection
The improvements in the DG401, DG403 series are made
possible by using a high voltage silicon-gate process. An
epitaxial layer prevents the latch-up associated with older
CMOS technologies. The 44V maximum voltage range
• DG401 Dual SPST; Same Pinout as HI-5041
• DG403 Dual SPDT; DG190, IH5043, IH5151, HI-5051
• TTL, CMOS Compatible
permits controlling 30V
signals. Power supplies may be
P-P
single-ended from +5V to +34V, or split from ±5V to ±17V.
• Single or Split Supply Operation
The analog switches are bilateral, equally matched for AC or
bidirectional signals. The ON resistance variation with analog
signals is quite low over a ±15V analog input range. The three
different devices provide the equivalent of two SPST (DG401)
or two SPDT (DG403) relay switch contacts with CMOS or
TTL level activation. The pinout is similar, permitting a
standard layout to be used, choosing the switch function as
needed.
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Audio Switching
• Battery Operated Systems
• Data Acquisition
• Hi-Rel Systems
• Sample and Hold Circuits
• Communication Systems
• Automatic Test Equipment
Pinouts
DG401
(16 LD SOIC, TSSOP)
TOP VIEW
D
1
2
3
4
5
6
7
8
16 S
1
Ordering Information
1
NC
NC
NC
NC
NC
NC
15
14
13
12
11
10
9
IN
1
PART
PART
TEMP.
PKG.
DWG. #
NUMBER*
MARKING RANGE (°C) PACKAGE
V-
DG401DY*
DG401DY
-40 to +85 16 Ld SOIC
M16.15
M16.15
GND
V
L
DG401DYZ* DG401DYZ
(Note)
-40 to +85 16 Ld SOIC
(Pb-free)
V+
DG401DVZ* DG401 DVZ -40 to +85 16 Ld TSSOP M16.173
(Note)
IN
2
(Pb-free)
S
2
D
2
DG403DY*
DG403DY
-40 to +85 16 Ld SOIC
M16.15
M16.15
DG403DYZ* DG403DYZ
(Note)
-40 to +85 16 Ld SOIC
(Pb-free)
DG403
(16 LD SOIC, TSSOP)
DG403DVZ* DG403 DVZ -40 to +85 16 Ld TSSOP M16.173
TOP VIEW
(Note)
(Pb-free)
D
1
2
3
4
5
6
7
8
16 S
1
*Add “-T” suffix for tape and reel.
1
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
NC
15 IN
1
D
S
S
D
14 V-
13 GND
12 V
3
3
4
4
L
11 V+
10 IN
NC
2
9
S
2
D
2
NOTE: (NC) No Connection.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 1999, 2002-2004, 2006. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
5秒后页面跳转
SL74HC10N：高性能三输入与非门解析
AIC1781A 电池充电控制器深度解析
Pickering新高压舌簧继电器亮相汽车测试博览会
采用MCU+MPU双处理器架构实现的创新应用设计探索
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
替代型号
如果您发现信息不准确，
