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DG308ADY PDF预览

DG308ADY

更新时间: 2024-11-22 23:16:31
品牌 Logo 应用领域
威世 - VISHAY 复用器开关复用器或开关信号电路
页数 文件大小 规格书
5页 54K
描述
Quad Monolithic SPST CMOS Analog Switches

DG308ADY 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Transferred零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:unknown风险等级:5.22
Is Samacsys:N模拟集成电路 - 其他类型:SPST
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
标称负供电电压 (Vsup):-15 V正常位置:NO
功能数量:4端子数量:16
最大通态电阻 (Ron):125 Ω最高工作温度:85 °C
最低工作温度:-40 °C输出:SEPARATE OUTPUT
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE电源:+-15 V
认证状态:Not Qualified子类别:Multiplexer or Switches
标称供电电压 (Vsup):15 V表面贴装:YES
最长接通时间:200 ns切换:BREAK-BEFORE-MAKE
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

DG308ADY 数据手册

 浏览型号DG308ADY的Datasheet PDF文件第2页浏览型号DG308ADY的Datasheet PDF文件第3页浏览型号DG308ADY的Datasheet PDF文件第4页浏览型号DG308ADY的Datasheet PDF文件第5页 
DG308A/DG309  
Vishay Siliconix  
Quad Monolithic SPST CMOS Analog Switches  
FEATURES  
BENEFITS  
APPLICATIONS  
D "15-V Analog Input Range  
D Low On-Resistance: 60 W  
D Fast Switching: 130 ns  
D Full Rail-to-Rail Analog Signal Range D Portable and Battery Powered  
Instrumentation  
D Low Signal Error  
D Communication Systems  
D Computer Peripherals  
D High-Speed Multiplexing  
D Wide Dynamic Range  
D Low Power Dissipation: 30 nW  
D CMOS Logic Compatible  
D Single or Dual Supply Capability  
D Static Protected Logic Inputs  
D Space Savings (TSSOP)  
DESCRIPTION  
Featuring low on-resistance (60 W) and fast switching  
(130 ns), the DG308A is supplied in the “normally open”  
configuration while DG309 is supplied “normally closed.” Input  
thresholds are high voltage CMOS compatible.  
voltage rating of 44 V, each switch conducts equally well in  
both directions when on, and blocks up to the supply voltage  
when off. An epitaxial layer prevents latch up.  
Designed with the Vishay Siliconix PLUS-40 CMOS process  
to combine low power dissipation with a high breakdown  
The DG308B/309B upgrades are recommended for new  
designs.  
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION  
DG308A  
IN  
D
1
1
1
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
IN  
D
2
Four SPST Switches per Package  
2
TRUTH TABLE  
S
S
2
Logic  
DG308A  
DG309  
V–  
V+  
0
1
OFF  
ON  
ON  
GND  
NC  
OFF  
S
S
3
4
4
4
Logic “0” v 3.5 V  
Logic “1” w 11 V  
D
D
3
IN  
IN  
3
9
Top View  
Document Number: 70046  
S-52882—Rev. E, 28-Apr-97  
www.vishay.com S FaxBack 408-970-5600  
4-1  

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