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DG2753

更新时间: 2024-09-29 06:53:03
品牌 Logo 应用领域
威世 - VISHAY 开关光电二极管
页数 文件大小 规格书
8页 133K
描述
Low Voltage, 0.7 Ω, Triple SPDT Analog Switch

DG2753 数据手册

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DG2753  
Vishay Siliconix  
Low Voltage, 0.7 Ω, Triple SPDT Analog Switch  
DESCRIPTION  
FEATURES  
Low Voltage Operation (1.65 to 4.3 V)  
Low On-Resistance - rON: 0.9 Ω at 2.7 V  
Fast Switching: TON = 30 ns  
TOFF = 10 ns  
The DG2753 is a low voltage, low on-resistance, triple sin-  
gle-pole/double-throw (SPDT) monolithic CMOS analog  
switch. The device is designed for operation from 1.65 V to  
4.3 V single supply. The device is 1.8 V logic compatible  
within the full operation voltage range to interface with low  
voltage DSP or MCU control logic. These traits make it ideal  
for one cell Li-ion battery direct power in portable applica-  
tions.  
QFN-16 (3 x 3) Package  
Latch-Up Current > 300 mA (JESD78)  
The DG2753 fully guarantees operation when V+ is as low  
as 1.8 V. When powered from a 3 V power supply, it has a  
0.9 Ω on-resistance, with 0.1 Ω RON matching between  
channels, and 0.2 Ω (Max) RON flatness.  
BENEFITS  
Reduced Power Consumption  
High Accuracy  
Each switch conducts signals across power rails equally well  
in both directions when on, and blocks up to the power sup-  
ply level when off. It offers 30 nS Ton and 10 nS Toff. Break-  
before-make is guaranteed.  
The DG2753 is built on Vishay Siliconix’s low voltage pro-  
cess. An epitaxial layer prevents latchup.  
Reduce Board Space  
TTL/1.8 V Logic Compatible  
APPLICATIONS  
Cellular Phones  
Speaker Headset Switching  
Audio and Video Signal Routing  
PCMCIA Cards  
It is available in QFN16 3 x 3 mm and TSSOP16 packages.  
As a committed partner to the community and the environ-  
ment, Vishay Siliconix manufactures this product with lead  
(Pb)-free device terminations. For analog switching products  
manufactured in QFN packages, the lead (Pb)-free "-E4" suf-  
fix is being used as a designator for nickel-palladium-gold.  
The TSSOP-16 package is offered in lead (Pb)-free with  
100 % matte Tin terminations. The "-E3" suffix is the desig-  
nator. Both the 100 % matte Tin and nickel-palladium gold  
device terminations meet all JEDEC standards for reflow  
and MSL ratings.  
Battery Operated Systems  
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION  
QFN16 (3 x 3)  
TSSOP16  
Y1  
Y0  
Z1  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
V
Y
X
Z
X1  
Z0  
12 X0  
Enable  
NC  
11  
10  
9
A
B
C
GND  
ORDERING INFORMATION  
Temp Range  
Package  
Part Number  
TSSOP-16  
DG2753DQ-T1-E3  
- 40 to 85 °C  
16-Pin QFN (3 mm x 3 mm)  
Variation 2  
DG2753DN-T1-E4  
Document Number: 73482  
S-62653–Rev. B, 01-Jan-07  
www.vishay.com  
1

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