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DG221 PDF预览

DG221

更新时间: 2024-01-19 00:24:05
品牌 Logo 应用领域
其他 - ETC 开关
页数 文件大小 规格书
6页 93K
描述
Quad SPST CMOS Analog Switch with Latches(90.78 k)

DG221 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.67
模拟集成电路 - 其他类型:SPSTJESD-30 代码:R-PDSO-G
信道数量:4功能数量:1
最大通态电阻 (Ron):90 Ω封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
最大供电电压 (Vsup):44 V表面贴装:YES
最长接通时间:550 ns端子形式:GULL WING
端子位置:DUALBase Number Matches:1

DG221 数据手册

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DG221  
Quad SPST CMOS Analog Switch with Latches  
Features  
Benefits  
Applications  
D Accepts 150-ns Write Pulse Width  
D 5-V On-Chip Regulator  
D Compatible with Most mP Buses  
D mP Based Systems  
D Allows Wide Power Supply Tolerance D Automatic Test Equipment  
Without Affecting TTL Compatibility  
D Built on PLUS-40 Process  
D Communication Systems  
D Reduced Power Consumption  
D Latches Are Transparent with WR Low  
D Low On-Resistance: 60 W  
D Data Acquisition Systems  
D Medical Instrumentation  
D Factory Automation  
D Allows Flexibility of Design  
Description  
The DG221 is a monolithic quad single-pole, single-throw DG221 combines low power and low on-resistance (60 W  
analog switch designed for precision switching applications in typical) while handling continuous currents up to 20 mA.  
communication, instrumentation and process control systems. An epitaxial layer prevents latchup.  
Featuring independent onboard latches and a common WR  
pin, each DG221 can be memory mapped, and addressed as  
a single data byte for simultaneous switching.  
The device features true bidirectional performance in the on  
condition. These switches guarantee a rail-to-rail blocking  
Designed on the Siliconix PLUS-40 CMOS process, the capability (44 V max), in the off condition.  
Functional Block Diagram and Pin Configuration  
Four Latchable SPST Switches per Package  
Dual-In-Line and SOIC  
Truth Table  
INX  
WR  
Switch  
IN  
D
S
IN  
2
1
1
1
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
0
1
0
0
ON  
D
2
OFF  
S
2
Control data latched-in,  
switches on or off as selected  
X
X
V–  
V+  
by last IN  
X
GND  
WR  
1
Maintains previous state  
S
4
S
3
Logic “0” v 0.8 V  
Logic “1” w 2.4 V  
D
D
3
4
4
IN  
IN  
3
Ordering Information  
Package  
Temp Range  
0_C to 70_C  
–40_C to 85_C  
–55_C to 125_C  
Part Number  
DG221CJ  
Top View  
16-Pin Plastic DIP  
16-Pin Narrow SOIC  
16-Pin CerDIP  
DG221DY  
DG221AK/883  
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70041.  
Siliconix  
1
S-52881—Rev. C, 28-Apr-97  

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