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DG2019

更新时间： 2024-10-31 22:49:03
品牌 Logo 应用领域
威世 - VISHAY 开关光电二极管
页数 文件大小 规格书
8页 82K
描述
Low Voltage, Dual DPDT and Quad SPDT Analog Switches

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中文翻译

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DG2019 数据手册

 浏览型号DG2019的Datasheet PDF文件第2页浏览型号DG2019的Datasheet PDF文件第3页浏览型号DG2019的Datasheet PDF文件第4页浏览型号DG2019的Datasheet PDF文件第5页浏览型号DG2019的Datasheet PDF文件第6页浏览型号DG2019的Datasheet PDF文件第7页 
DG2018/2019  
Vishay Siliconix  
New Product  
Low Voltage, Dual DPDT and Quad SPDT Analog Switches  
FEATURES  
BENEFITS  
APPLICATIONS  
D Low Voltage Operation (1.8 V to 5.5 V)  
D Low On Resistance  
D Ideal for Both Analog and Digital  
D Cellular Phones  
Signal Switching  
D Audio and Video Signal Routing  
D PCMCIA Cards  
– rDS(on) : 6 W @ 2.7 V  
D Reduced Power Consumption  
D Low Voltage Logic Compatible  
D High Accuracy  
D Battery Operated Systems  
D Portable Instrumentation  
– DG2019: VINH = 1 V  
D Reduced PCB Space  
D Fast Switching  
D High Bandwidth: 150 MHz  
D QFN-16 Package  
D Low Leakage  
DESCRIPTION  
The DG2018 and DG2019 are low voltage, single supply  
analog switches. The DG2018 is dual  
double-pole/double-throw (DPDT) with two control inputs that  
each controls a pair of single-pole/double-throw (SPDT). The  
DG2019 uses one control pin to operate four independent  
SPDT switches.  
performance switching of analog signals; providing low  
on-resistance (6 W @ +2.7 V), fast speed (Ton, Toff @ 42 ns  
and 16 ns), and a bandwidth that exceeds 150 MHz.  
a
The DG2018 and DG2019 were designed to offer solutions  
that extend beyond audio/video functions, to providing the  
performance required for today’s demanding mixed-signal  
switching in portable applications.  
When operated on a +3-V supply, the DG2018’s control pins  
are compatible with 1.8-V digital logic. The DG2019 has an  
available feature of a VL pin that allows a 1.0-V threshold for the  
control pin when VL is powered with 1.5 V.  
An epitaxial layer prevents latch-up. Brake-before-make is  
guaranteed for all SPDT’s. All switches conduct equally well in  
both directions when on, and blocks up to the power supply  
level when off.  
Built on Vishay Siliconix’s low voltage submicron CMOS  
process, the DG2018 and DG2019 are ideal for high  
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION  
DG2018DN  
QFN-16 (3 X 3)  
IN1, IN2  
TRUTH TABLE  
COM1 NO1  
V+  
NC4  
Logic  
NC1 and NC2  
NO1 and NO2  
16 15  
14  
13  
0
1
ON  
OFF  
ON  
OFF  
NC1  
IN1, IN2  
NO2  
COM4  
NO4  
1
2
3
4
12  
11  
10  
9
IN3, IN4  
Logic  
NC3 and NC4  
NO3 and NO4  
IN3, IN4  
NC3  
0
1
ON  
OFF  
ON  
OFF  
COM2  
ORDERING INFORMATION  
5
6
7
8
Temp Range  
Package  
Part Number  
NC2 GND NO3 COM3  
Top View  
-40 to 85°C  
QFN-16 (3 x 3 mm)  
DG2018DN  
Document Number: 72342  
S-31644—Rev. A, 01-Aug-03  
www.vishay.com  
1
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