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DG2018DN-E3 PDF预览

DG2018DN-E3

更新时间: 2024-11-26 15:30:55
品牌 Logo 应用领域
威世 - VISHAY 光电二极管输出元件
页数 文件大小 规格书
10页 136K
描述
IC DUAL 2-CHANNEL, DBL POLE DBL THROW SWITCH, QCC16, 3 X 3 MM, QFN-16, Multiplexer or Switch

DG2018DN-E3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Not Recommended零件包装代码:QFN
包装说明:HVQCCN, LCC16,.12SQ,20针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.44模拟集成电路 - 其他类型:DPDT
JESD-30 代码:S-XQCC-N16JESD-609代码:e4
长度:3 mm湿度敏感等级:1
正常位置:NO/NC信道数量:2
功能数量:2端子数量:16
标称断态隔离度:67 dB通态电阻匹配规范:0.6 Ω
最大通态电阻 (Ron):12 Ω最高工作温度:85 °C
最低工作温度:-40 °C输出:SEPARATE OUTPUT
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC16,.12SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Multiplexer or Switches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.8 V
标称供电电压 (Vsup):3 V表面贴装:YES
最长断开时间:35 ns最长接通时间:65 ns
切换:BREAK-BEFORE-MAKE技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:3 mmBase Number Matches:1

DG2018DN-E3 数据手册

 浏览型号DG2018DN-E3的Datasheet PDF文件第2页浏览型号DG2018DN-E3的Datasheet PDF文件第3页浏览型号DG2018DN-E3的Datasheet PDF文件第4页浏览型号DG2018DN-E3的Datasheet PDF文件第5页浏览型号DG2018DN-E3的Datasheet PDF文件第6页浏览型号DG2018DN-E3的Datasheet PDF文件第7页 
DG2018, DG2019  
Vishay Siliconix  
Low Voltage, Dual DPDT and Quad SPDT Analog Switches  
DESCRIPTION  
FEATURES  
The DG2018 and DG2019 are low voltage, single supply  
analog switches. The DG2018 is a dual double-pole/double-  
throw (DPDT) with two control inputs that each controls a  
pair of single-pole/double-throw (SPDT). The DG2019 uses  
one control pin to operate four independent SPDT switches.  
Low voltage operation (1.8 V to 5.5 V)  
Low on resistance  
- RDS(on): 6 Ω at 2.7 V  
Low voltage logic compatible  
- DG2019: VINH = 1 V  
When operated on a + 3 V supply, the DG2018’s control pins  
are compatible with 1.8 V digital logic. The DG2019 has an  
available feature of a VL pin that allows a 1.0 V threshold for  
the control pin when VL is powered with 1.5 V.  
High bandwidth: 180 MHz  
QFN-16 package  
BENEFITS  
Built on Vishay Siliconix’s low voltage submicron CMOS  
process, the DG2018 and DG2019 are ideal for high  
performance switching of analog signals; providing low on-  
resistance (6 Ω at + 2.7 V), fast speed (Ton, Toff at 42 ns and  
16 ns), and a bandwidth that exceeds 180 MHz.  
Ideal for both analog and digital signal switching  
Reduced power consumption  
High accuracy  
Reduced PCB space  
Fast switching  
The DG2018 and DG2019 were designed to offer solutions  
that extend beyond audio/video functions, to providing the  
performance required for today’s demanding mixed-signal  
switching in portable applications.  
Low leakage  
APPLICATIONS  
Cellular phones  
An epitaxial layer prevents latch-up. Brake-before-make is  
guaranteed for all SPDT’s. All switches conduct equally well  
in both directions when on, and blocks up to the power  
supply level when off.  
Audio and video signal routing  
PCMCIA cards  
Battery operated systems  
Portable instrumentation  
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION  
DG2018DN  
QFN-16 (3 X 3)  
TRUTH TABLE  
IN1, IN2  
COM1 NO1  
16 15  
V+  
14  
NC4  
13  
Logic  
NC1 and NC2  
NO1 and NO2  
0
1
ON  
OFF  
ON  
OFF  
IN3, IN4  
NC1  
IN1, IN2  
NO2  
COM4  
NO4  
1
2
3
4
12  
11  
10  
9
Logic  
NC3 and NC4  
NO3 and NO4  
0
1
ON  
OFF  
ON  
OFF  
IN3, IN4  
NC3  
COM2  
ORDERING INFORMATION  
Temp. Range  
Package  
Part Number  
5
6
7
8
- 40 °C to 85 °C  
QFN-16 (3 x 3 mm)  
DG2018DN  
NC2 GND NO3 COM3  
Top View  
Document Number: 72342  
S-82626-Rev. C, 03-Nov-08  
www.vishay.com  
1

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