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DDU8C3-5045A1 PDF预览

DDU8C3-5045A1

更新时间: 2024-11-30 19:44:23
品牌 Logo 应用领域
DATADELAY 逻辑集成电路延迟线
页数 文件大小 规格书
4页 44K
描述
Active Delay Line, 1-Func, 5-Tap, True Output, CMOS, LOW PROFILE, GULLWING, DIP-8

DDU8C3-5045A1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.72JESD-30 代码:R-XDSO-G8
JESD-609代码:e3逻辑集成电路类型:ACTIVE DELAY LINE
功能数量:1抽头/阶步数:5
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:UNSPECIFIED封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED可编程延迟线:NO
认证状态:Not Qualified座面最大高度:7.62 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN端子形式:GULL WING
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED总延迟标称(td):45 ns
宽度:6.858 mmBase Number Matches:1

DDU8C3-5045A1 数据手册

 浏览型号DDU8C3-5045A1的Datasheet PDF文件第2页浏览型号DDU8C3-5045A1的Datasheet PDF文件第3页浏览型号DDU8C3-5045A1的Datasheet PDF文件第4页 
DDU8C3  
Ò
5-TAP, 3.3V CMOS-INTERFACED  
FIXED DELAY LINE  
(SERIES DDU8C3)  
data  
delay  
devices,  
3
inc.  
FEATURES  
PACKAGES  
IN  
T2  
VDD  
T1  
·
·
·
·
·
·
Five equally spaced outputs  
Fits standard 8-pin DIP socket  
Low profile  
1
2
3
4
8
7
6
5
T4  
T3  
GND  
T5  
Auto-insertable  
Input & outputs fully CMOS interfaced & buffered  
DDU8C3-xx  
DDU8C3-xxA1 Gull-Wing  
DIP  
10 T2L fan-out capability  
FUNCTIONAL DESCRIPTION  
PIN DESCRIPTIONS  
The DDU8C3-series device is a 5-tap digitally buffered delay line. The  
signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an  
amount determined by the device dash number (See Table). For dash  
numbers 5020 and above, the total delay of the line is measured from IN to  
T5, and the nominal tap-to-tap delay increment is given by one-fifth of the  
IN  
T1-T5 Tap Outputs  
VDD +3.3 Volts  
GND Ground  
Signal Input  
total delay. For dash numbers below 5020, the total delay is measured from T1 to T5, and the delay  
increment is given by one-fourth of the total delay.  
SERIES SPECIFICATIONS  
DASH NUMBER SPECIFICATIONS  
·
·
·
·
Minimum input pulse width: 40% of total delay  
Output rise time: 2ns typical  
Supply voltage: 3.3VDC ± 0.3V  
Supply current: ICCL = 40ma typical  
ICCH = 7ma typical  
Part  
Number  
Total  
Delay Per  
Tap (ns)  
1.0 ± 0.5  
1.5 ± 0.5  
2.0 ± 1.0  
2.5 ± 1.0  
3.0 ± 1.0  
3.5 ± 1.0  
4.0 ± 1.0  
5.0 ± 1.5  
6.0 ± 1.5  
7.0 ± 1.8  
8.0 ± 2.0  
9.0 ± 2.0  
10.0 ± 2.0  
12.0 ± 2.0  
15.0 ± 2.5  
20.0 ± 3.0  
25.0 ± 3.0  
30.0 ± 3.0  
35.0 ± 4.0  
40.0 ± 4.0  
50.0 ± 5.0  
Delay (ns)  
4 ± 1.0 *  
6 ± 1.0 *  
8 ± 2.0 *  
10 ± 2.0 *  
12 ± 2.0 *  
14 ± 2.0 *  
20 ± 2.0  
25 ± 2.0  
30 ± 2.0  
35 ± 2.0  
40 ± 2.0  
45 ± 2.25  
50 ± 2.5  
60 ± 3.0  
75 ± 3.75  
100 ± 5.0  
125 ± 6.5  
150 ± 7.5  
175 ± 8.0  
200 ± 10.0  
250 ± 12.5  
DDU8C3-5004  
DDU8C3-5006  
DDU8C3-5008  
DDU8C3-5010  
DDU8C3-5012  
DDU8C3-5014  
DDU8C3-5020  
DDU8C3-5025  
DDU8C3-5030  
DDU8C3-5035  
DDU8C3-5040  
DDU8C3-5045  
DDU8C3-5050  
DDU8C3-5060  
DDU8C3-5075  
DDU8C3-5100  
DDU8C3-5125  
DDU8C3-5150  
DDU8C3-5175  
DDU8C3-5200  
DDU8C3-5250  
·
·
Operating temperature: -40° to 85° C  
Temp. coefficient of total delay: 300 PPM/°C  
3.0ns  
25%  
25%  
25%  
25%  
VDD IN  
T1  
T2  
T3  
T4  
T5 GND  
Functional diagram for dash numbers < 5020  
20%  
20%  
20%  
20%  
20%  
VDD IN  
T1  
T2  
T3  
T4  
T5 GND  
* Total delay is referenced to first tap output  
Input to first tap = 3.0ns ± 1ns  
Functional diagram for dash numbers >= 5020  
NOTE: Any dash number between 5004 and 5250  
not shown is also available.  
Ó2000 Data Delay Devices  
Doc #00115  
5/19/00  
DATA DELAY DEVICES, INC.  
3 Mt. Prospect Ave. Clifton, NJ 07013  
1

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