Datasheet > DDU66C-60

DDU66C-60

更新时间： 2024-11-23 23:46:47

品牌	Logo	应用领域
其他 - ETC		延迟线
页数	文件大小	规格书
4页	81K
描述
Tapped Delay Line

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中文翻译

获取价格

数据手册

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DDU66C-60 数据手册

DDU66C

5-TAP, HCMOS-INTERFACED

FIXED DELAY LINE

(SERIES DDU66C)

data

delay

devices,

inc.

FEATURES

PACKAGES

VDD

Five equally spaced outputs

Fits standard 14-pin DIP socket

Low profile

Auto-insertable

Input & outputs fully CMOS interfaced & buffered

VDD

N/C

GND

10 T²L fan-out capability

DDU66C-xx

DDU66C-xxA2 Gull-Wing

DDU66C-xxB2 J-Lead

DIP

DDU66C-xxD1

DDU66C-xxD4

DDU66C-xxMD1 Mil. SMD

DDU66C-xxMD4 Mil. SMD

Com. SMD

DDU66C-xxME7Military DIP

FUNCTIONAL DESCRIPTION

PIN DESCRIPTIONS

The DDU66C-series device is a 5-tap digitally buffered delay line. The

signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an

amount given by the device dash number. For dash numbers less than 40,

the total delay of the line is measured from T1 to T5, with the nominal value

given by the dash number. The nominal tap-to-tap delay increment is

T1-T5 Tap Outputs

VDD +5 Volts

GND Ground

Signal Input

given by 1/4 of this number. The inherent delay from IN to T1 is nominally 8.0ns. For dash numbers

greater than or equal to 40, the total delay of the line is measured from IN to T5, with the nominal value

given by the dash number. The nominal tap-to-tap delay increment is given by 1/5 of this number.

SERIES SPECIFICATIONS

DASH NUMBER SPECIFICATIONS

Minimum input pulse width: 40% of total delay

Output rise time: 8ns typical

Supply voltage: 5VDC ± 5%

Supply current: I_CCL= 40ma typical

I_CCH= 10ma typical

Operating temperature: 0° to 70° C

Temp. coefficient of total delay: 300 PPM/°C

Part

Number

Total

Delay Per

Tap (ns)

2.5 ± 1.0

Delay (ns)

10 ± 2.0 *

20 ± 2.0 *

50 ± 3.0

60 ± 3.0

75 ± 4.0

100 ± 5.0

125 ± 6.5

150 ± 7.5

175 ± 8.0

200 ± 10.0

250 ± 12.5

DDU222C-10

DDU222C-20

DDU222C-50

DDU222C-60

DDU222C-75

DDU222C-100

DDU222C-125

DDU222C-150

DDU222C-175

DDU222C-200

DDU222C-250

5.0 ± 2.0

10.0 ± 3.0

12.0 ± 3.0

15.0 ± 3.0

20.0 ± 3.0

25.0 ± 3.0

30.0 ± 3.0

35.0 ± 4.0

40.0 ± 4.0

50.0 ± 5.0

8.0ns

25%

* Total delay is referenced to first tap output

VCC IN

T5 GND

Input to first tap = 8.0ns ± 2ns

Functional diagram for dash numbers < 40

NOTE: Any dash number between 10 and 250 not

shown is also available.

20%

VCC IN

T5 GND

Functional diagram for dash numbers >= 40

Ó1997 Data Delay Devices

Doc #97021

DATA DELAY DEVICES, INC.

3 Mt. Prospect Ave. Clifton, NJ 07013

2/5/97

12 3 4

中文翻译

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与DDU66C-60相关器件

型号	品牌	获取价格	描述	数据表
DDU66C-60A2	DATADELAY	获取价格	5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU66C)
DDU66C-60B2	DATADELAY	获取价格	5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU66C)
DDU66C-60D1	DATADELAY	获取价格	5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU66C)
DDU66C-60D4	DATADELAY	获取价格	5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU66C)
DDU66C-60MD1	DATADELAY	获取价格	5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU66C)
DDU-66C-60MD4	DATADELAY	获取价格	Active Delay Line, 1-Func, 5-Tap, True Output, CMOS,
DDU66C-60MD4	DATADELAY	获取价格	5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU66C)
DDU66C-60ME7	DATADELAY	获取价格	5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU66C)
DDU66C-75	ETC	获取价格	Tapped Delay Line
DDU66C-75A2	DATADELAY	获取价格	5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU66C)

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