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DDU222C-75 PDF预览

DDU222C-75

更新时间: 2024-11-01 10:01:51
品牌 Logo 应用领域
DATADELAY 延迟线逻辑集成电路
页数 文件大小 规格书
4页 34K
描述
5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU222C)

DDU222C-75 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DIP
包装说明:DIP, SIP8,.06针数:14
Reach Compliance Code:compliant风险等级:5.13
JESD-30 代码:R-XDIP-T8长度:19.304 mm
逻辑集成电路类型:ACTIVE DELAY LINE功能数量:1
抽头/阶步数:5端子数量:8
最高工作温度:70 °C最低工作温度:
输出极性:TRUE封装主体材料:UNSPECIFIED
封装代码:DIP封装等效代码:SIP8,.06
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):10 mA可编程延迟线:NO
Prop。Delay @ Nom-Sup:75 ns认证状态:Not Qualified
座面最大高度:7.747 mm子类别:Delay Lines
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
总延迟标称(td):75 ns宽度:7.62 mm
Base Number Matches:1

DDU222C-75 数据手册

 浏览型号DDU222C-75的Datasheet PDF文件第2页浏览型号DDU222C-75的Datasheet PDF文件第3页浏览型号DDU222C-75的Datasheet PDF文件第4页 
DDU222C  
Ò
5-TAP, HCMOS-INTERFACED  
FIXED DELAY LINE  
(SERIES DDU222C)  
data  
delay  
3
devices, inc.  
FEATURES  
PACKAGES  
·
·
·
·
·
Five equally spaced outputs  
Very narrow device (SIP package)  
Stackable for PC board economy  
Input & outputs fully CMOS interfaced & buffered  
10 T2L fan-out capability  
1 2 3 4 5 6 7 8  
VCC IN T1 T2 T3 T4 T5 GND  
DDU222F-xx Commercial  
DDU222F-xxM Military  
FUNCTIONAL DESCRIPTION  
PIN DESCRIPTIONS  
The DDU222C-series device is a 5-tap digitally buffered delay line. The  
signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an  
amount given by the device dash number. For dash numbers less than  
40, the total delay of the line is measured from T1 to T5, with the nominal  
value given by the dash number. The nominal tap-to-tap delay increment  
IN  
Signal Input  
T1-T5 Tap Outputs  
VDD +5 Volts  
GND Ground  
is given by 1/4 of this number. The inherent delay from IN to T1 is nominally 8.0ns. For dash numbers  
greater than or equal to 40, the total delay of the line is measured from IN to T5, with the nominal value  
given by the dash number. The nominal tap-to-tap delay increment is given by 1/5 of this number.  
SERIES SPECIFICATIONS  
DASH NUMBER SPECIFICATIONS  
Part  
Number  
Total  
Delay Per  
Tap (ns)  
2.5 ± 1.0  
·
·
·
·
Minimum input pulse width: 40% of total delay  
Output rise time: 8ns typical  
Supply voltage: 5VDC ± 5%  
Supply current: ICCL = 40ma typical  
ICCH = 10ma typical  
Operating temperature: 0° to 70° C  
Temp. coefficient of total delay: 300 PPM/°C  
Delay (ns)  
10 ± 2.0 *  
20 ± 2.0 *  
50 ± 3.0  
60 ± 3.0  
75 ± 4.0  
100 ± 5.0  
125 ± 6.5  
150 ± 7.5  
175 ± 8.0  
200 ± 10.0  
250 ± 12.5  
DDU222C-10  
DDU222C-20  
DDU222C-50  
DDU222C-60  
DDU222C-75  
DDU222C-100  
DDU222C-125  
DDU222C-150  
DDU222C-175  
DDU222C-200  
DDU222C-250  
5.0 ± 2.0  
10.0 ± 3.0  
12.0 ± 3.0  
15.0 ± 3.0  
20.0 ± 3.0  
25.0 ± 3.0  
30.0 ± 3.0  
35.0 ± 4.0  
40.0 ± 4.0  
50.0 ± 5.0  
·
·
8.0ns  
25%  
25%  
25%  
25%  
* Total delay is referenced to first tap output  
Input to first tap = 8.0ns ± 2ns  
VCC IN  
T1  
T2  
T3  
T4  
T5 GND  
NOTE: Any dash number between 10 and 250 not  
shown is also available.  
Functional diagram for dash numbers < 40  
20%  
20%  
20%  
20%  
20%  
VCC IN  
T1  
T2  
T3  
T4  
T5 GND  
Functional diagram for dash numbers >= 40  
Ó1997 Data Delay Devices  
Doc #97014  
1/28/97  
DATA DELAY DEVICES, INC.  
3 Mt. Prospect Ave. Clifton, NJ 07013  
1

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