3D7521
MONOLITHIC MANCHESTER
ENCODER
3
delay
(SERIES 3D7521)
devices, inc.
FEATURES
PACKAGES
•
•
•
All-silicon, low-power CMOS
technology
CLK
N/C
N/C
RESB
DAT
N/C
1
2
3
4
5
6
7
14
13
12
11
10
9
VDD
N/C
N/C
N/C
N/C
TXB
TX
TTL/CMOS compatible inputs and
outputs
Vapor phase, IR and wave
solderable
Low ground bounce noise
Maximum data rate: 50 MBaud
CLK
RESB
DAT
1
2
3
4
8
7
6
5
VDD
N/C
TXB
TX
•
•
GND
8
GND
3D7521D SOIC (.150)
3D7521Z SOIC (.150)
For mechanical dimensions, click here.
For package marking details, click here.
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The 3D7521 is a monolithic CMOS Manchester Encoder. The clock
and data, present at the unit input, are combined into a single bi-phase-
level signal. In this encoding mode, a logic one is represented by a
high-to-low transition within the bit cell, while a logic zero is represented
by a low-to-high transition. The unit operating baud rate (in Mbaud) is
equal to the input clock frequency (in MHZ). All pins marked N/C must
be left unconnected.
DAT
CLK
Data Input
Clock Input
RESB Reset
TX
Signal Output
TXB
Inverted Signal Output
VDD +5 Volts
GND Ground
The all-CMOS 3D7521 integrated circuit has been designed as a reliable, economic alternative to hybrid
TTL Manchester Encoder. It is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads. It is
offered in space saving surface mount 8-pin and 14-pin SOICs.
Doc #06001
10/31/2007
DATA DELAY DEVICES, INC.
1
3 Mt. Prospect Ave. Clifton, NJ 07013