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DAC8420_07

更新时间: 2024-11-26 12:27:27
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
24页 1183K
描述
Quad 12-Bit Serial Voltage Output DAC

DAC8420_07 数据手册

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Quad 12-Bit Serial  
Voltage Output DAC  
DAC8420  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
VREFHI  
VDD  
Guaranteed monotonic over temperature  
Excellent matching between DACs  
Unipolar or bipolar operation  
Buffered voltage outputs  
High speed serial digital interface  
Reset-to-zero scale or midscale  
Wide supply range, +5 V only to 15 V  
Low power consumption (35 mW maximum)  
Available in 16-Lead PDIP, SOIC, and CERDIP packages  
5
1
DAC8420  
10  
SDI  
REG  
A
7
6
3
2
DAC A  
DAC B  
DAC C  
DAC D  
VOUTA  
VOUTB  
VOUTC  
VOUTD  
12  
12  
11  
CS  
REG  
B
CLK  
SHIFT  
REGISTER  
13  
14  
NC  
LD  
APPLICATIONS  
REG  
C
4
Software controlled calibration  
Servo controls  
Process control and automation  
ATE  
DECODE  
REG  
D
2
9
16  
CLSEL CLR  
8
15  
4
GND  
VREFLO  
VSS  
Figure 1.  
GENERAL DESCRIPTION  
asynchronously overriding the current DAC register values. The  
output voltage range, determined by the inputs VREFHI and  
VREFLO, is set by the user for positive or negative unipolar or  
bipolar signal swings within the supplies, allowing considerable  
design flexibility.  
The DAC8420 is a quad, 12-bit voltage-output DAC with serial  
digital interface in a 16-lead package. Utilizing BiCMOS tech-  
nology, this monolithic device features unusually high circuit  
density and low power consumption. The simple, easy-to-use  
serial digital input and fully buffered analog voltage outputs  
require no external components to achieve a specified per-  
formance.  
The DAC8420 is available in 16-lead PDIP, SOIC, and CERDIP  
packages. Operation is specified with supplies ranging from  
+5 V only to 15 V, with references of +2.5 V to 10 V, respec-  
tively. Power dissipation when operating from 15 V supplies is  
less than 255 mW (maximum) and only 35 mW (maximum)  
with a +5 V supply.  
The 3-wire serial digital input is easily interfaced to micro-  
processors running at 10 MHz with minimal additional  
circuitry. Each DAC is addressed individually by a 16-bit  
serial word consisting of a 12-bit data word and an address  
CLR  
header. The user-programmable reset control  
forces all  
four DAC outputs to either zero scale or midscale,  
Rev. B  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2007 Analog Devices, Inc. All rights reserved.  
 
 

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