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DAC8143 PDF预览

DAC8143

更新时间: 2024-11-27 22:50:43
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
12页 184K
描述
12-Bit Serial Daisy-Chain CMOS D/A Converter

DAC8143 数据手册

 浏览型号DAC8143的Datasheet PDF文件第2页浏览型号DAC8143的Datasheet PDF文件第3页浏览型号DAC8143的Datasheet PDF文件第4页浏览型号DAC8143的Datasheet PDF文件第5页浏览型号DAC8143的Datasheet PDF文件第6页浏览型号DAC8143的Datasheet PDF文件第7页 
12-Bit Serial Daisy-Chain  
CMOS D/A Converter  
a
DAC8143  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Fast, Flexible, Microprocessor Interfacing in Serially  
Controlled Systems  
V
DD  
Buffered Digital Output Pin for Daisy-Chaining  
Multiple DACs  
Minimizes Address-Decoding in Multiple DAC  
Systems—Three-Wire Interface for Any Number of DACs  
One Data Line  
R
FB  
DAC8143  
I
I
OUT1  
12-BIT  
D/A CONVERTER  
V
REF  
OUT2  
One CLK Line  
One Load Line  
CLR  
AGND  
Improved Resistance to ESD  
–40؇C to +85؇C for the Extended Industrial Temperature  
Range  
LD  
1
DAC REGISTER  
LOAD  
LD  
STB  
STB  
STB  
STB  
2
1
4
3
2
APPLICATIONS  
Multiple-Channel Data Acquisition Systems  
Process Control and Industrial Automation  
Test Equipment  
CLK  
INPUT 12-BIT  
SHIFT REGISTER  
IN  
OUT  
SRO  
Remote Microprocessor-Controlled Systems  
SRI  
GENERAL INFORMATION  
DGND  
The DAC8143 is a 12-bit serial-input daisy-chain CMOS D/A  
converter that features serial data input and buffered serial data  
output. It was designed for multiple serial DAC systems, where  
serially daisy-chaining one DAC after another is greatly simplified.  
ADDRESS BUS  
The DAC8143 also minimizes address decoding lines enabling  
simpler logic interfacing. It allows three-wire interface for any  
number of DACs: one data line, one CLK line and one load line.  
ADDRESS  
DECODER  
WR  
Serial data in the input register (MSB first) is sequentially  
clocked out to the SRO pin as the new data word (MSB first) is  
simultaneously clocked in from the SRI pin. The strobe inputs  
are used to clock in/out data on the rising or falling (user  
selected) strobe edges (STB1, STB2, STB3, STB4).  
STROBE  
SRI  
DB  
X
DAC8143  
LOAD  
SRO  
When the shift register’s data has been updated, the new data  
word is transferred to the DAC register with use of LD1 and  
LD2 inputs.  
P  
STROBE  
SRI  
DAC8143  
LOAD  
SRO  
Separate LOAD control inputs allow simultaneous output up-  
dating of multiple DACs. An asynchronous CLEAR input  
resets the DAC register without altering data in the input  
register.  
STROBE  
SRI  
DAC8143  
LOAD  
SRO  
Improved linearity and gain error performance permits reduced  
circuit parts count through the elimination of trimming compo-  
nents. Fast interface timing reduces timing design considerations  
while minimizing microprocessor wait states.  
STROBE  
SRI  
The DAC8143 is available in plastic packages that are compat-  
ible with autoinsertion equipment.  
DAC8143  
LOAD  
SRO  
Plastic packaged devices come in the extended industrial tem-  
perature range of –40°C to +85°C.  
Figure 1. Multiple DAC8143s with Three-Wire Interface  
REV. C  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1999  

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