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DAC5652MPFBREP PDF预览

DAC5652MPFBREP

更新时间： 2024-11-06 12:50:35
品牌 Logo 应用领域
德州仪器 - TI 转换器数模转换器PC
页数 文件大小 规格书
27页 680K
描述
DUAL 10-BIT 200-MSPS DIGITAL-TO-ANALOG CONVERTER

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中文翻译

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DAC5652MPFBREP 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：QFP
包装说明：TQFP-48针数：48
Reach Compliance Code：compliantECCN代码：3A001.A.2.C
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.21Samacsys Confidence：
Samacsys Status：ReleasedSamacsys PartID：605494
Samacsys Pin Count：48Samacsys Part Category：Integrated Circuit
Samacsys Package Category：OtherSamacsys Footprint Name：QFP50P900X900X120-48N
Samacsys Released Date：2017-01-12 12:59:53Is Samacsys：N
最大模拟输出电压：1.25 V最小模拟输出电压：-0.8 V
转换器类型：D/A CONVERTER输入位码：OFFSET BINARY
输入格式：PARALLEL, WORDJESD-30 代码：S-PQFP-G48
JESD-609代码：e4长度：7 mm
最大线性误差 (EL)：0.0977%湿度敏感等级：2
位数：10功能数量：1
端子数量：48最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：TFQFP封装等效代码：TQFP48,.35SQ
封装形状：SQUARE封装形式：FLATPACK, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified采样速率：275 MHz
座面最大高度：1.2 mm标称安定时间 (tstl)：0.02 µs
子类别：Other Converters最大压摆率：90 mA
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7 mm
Base Number Matches：1

DAC5652MPFBREP 数据手册

 浏览型号DAC5652MPFBREP的Datasheet PDF文件第2页浏览型号DAC5652MPFBREP的Datasheet PDF文件第3页浏览型号DAC5652MPFBREP的Datasheet PDF文件第4页浏览型号DAC5652MPFBREP的Datasheet PDF文件第5页浏览型号DAC5652MPFBREP的Datasheet PDF文件第6页浏览型号DAC5652MPFBREP的Datasheet PDF文件第7页 
DAC5652-EP  
www.ti.com  
SGLS341B–JUNE 2006–REVISED OCTOBER 2006  
DUAL 10-BIT 200-MSPS DIGITAL-TO-ANALOG CONVERTER  
FEATURES  
•
High Third-Order Two-Tone Intermodulation  
(IMD3): 78 dBc at 15.1 MHz and 16.1 MHz  
•
Controlled Baseline  
•
•
•
•
•
•
Independent or Single Resistor Gain Control  
Dual or Interleaved Data  
– One Assembly  
– One Test Site  
On-Chip 1.2-V Reference  
– One Fabrication Site  
Low Power: 290 mW  
•
•
Extended Temperature Performance of  
–55°C to 125°C  
Power-Down Mode: 9 mW  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
Package: 48-Pin Thin Quad Flat Pack (TQFP)  
APPLICATIONS  
•
•
•
Enhanced Product-Change Notification  
•
Cellular Base Transceiver Station Transmit  
Channel  
(1)  
Qualification Pedigree  
10-Bit Dual Transmit Digital-to-Analog  
Converter (DAC)  
– CDMA: W-CDMA, CDMA2000, IS-95  
– TDMA: GSM, IS-136, EDGE/UWC-136  
Medical/Test Instrumentation  
Arbitrary Waveform Generators (ARB)  
Direct Digital Synthesis (DDS)  
•
•
•
200-MSPS Update Rate  
•
•
•
•
Single Supply: 3 V to 3.6 V  
High Spurious-Free Dynamic Range (SFDR):  
80 dBc at 5 MHz  
Cable Modem Termination System (CMTS)  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
DESCRIPTION  
The DAC5652 is a monolithic, dual-channel, 10-bit, high-speed digital-to-analog converter (DAC) with on-chip  
voltage reference.  
Operating with update rates of up to 200 MSPS, the DAC5652 offers exceptional dynamic performance, tight  
gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication  
applications.  
Each DAC has a high-impedance differential-current output, suitable for single-ended or differential  
analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC  
separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is  
temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may  
be used.  
The DAC5652 has two 10-bit parallel input ports with separate clocks and data latches. For flexibility, the  
DAC5652 also supports multiplexed data for each DAC on one port when operating in the interleaved mode.  
The DAC5652 has been specifically designed for a differential transformer-coupled output with a 50-Ω  
doubly-terminated load. For a 20-mA full-scale output current, both a 4:1 impedance ratio (resulting in an output  
power of 4 dBm) and 1:1 impedance ratio transformer (–2-dBm output power) are supported.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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DAC5652MPFBREP 替代型号

型号 品牌 替代类型 描述 数据表
V62/06638-01XE TI

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