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DAC56 PDF预览

DAC56

更新时间: 2024-09-23 22:40:31
品牌 Logo 应用领域
BB 转换器
页数 文件大小 规格书
5页 168K
描述
Monolithic 16-Bit Resolution DIGITAL-TO-ANALOG CONVERTER

DAC56 数据手册

 浏览型号DAC56的Datasheet PDF文件第2页浏览型号DAC56的Datasheet PDF文件第3页浏览型号DAC56的Datasheet PDF文件第4页浏览型号DAC56的Datasheet PDF文件第5页 
DAC56  
49
FPO  
®
DAC56  
DAC56  
Monolithic 16-Bit Resolution  
DIGITAL-TO-ANALOG CONVERTER  
APPLICATIONS  
FEATURES  
PROCESS CONTROL  
COMPLETE D/A CONVERTER:  
Internal Voltage Reference  
ATE PIN ELECTRONICS LEVEL SETTING  
CLOSED-LOOP SERVO-CONTROL  
±3V Output Operational Amplifier  
Pinout Allows IOUT (±1.0mA) Option  
No external components required  
AUTO-CALIBRATION CIRCUIT FOR A/D  
BOARDS  
0.012% LINEARITY ERROR MAX  
UP-GRADE REPLACEMENT FOR  
12-BIT MONOTONICITY GUARANTEED  
OVER 0°C TO +70°C  
MULTIPLYING D/A  
X-Y PLOTTER  
±5V TO ±12V POWER SUPPLY  
DSP PROCESSOR BOARDS  
SETTLING TIME: VOUT = 1.5µs;  
IOUT = 350ns  
SERIAL DATA INPUT: Binary Two’s  
Complement  
16-PIN PLASTIC DIP AND SOIC  
DESCRIPTION  
The DAC56 is a complete 16-bit monolithic D/A  
converter. Completely self-contained with a stable,  
low noise, internal zener voltage reference; high-speed  
current switches; a resistor ladder network; and a low  
noise output operational amplifier all on a single  
monolithic chip. The DAC56 operates over a wide  
power supply range from ±5V to ±12V.  
A high-speed interface is capable of clocking in data  
at a rate of 10MHz max, and its interface logic con-  
tains a serial data clock (input), serial data (input) and  
latch-enable (input). Serial data is clocked MSB first  
into a 16-bit register and then latched into a 16-bit  
parallel register.  
The DAC56 is packaged in a 16-pin plastic DIP and  
16-pin SOIC.  
Differential linearity error (DLE) is guaranteed to  
meet specifications without external adjustment. How-  
ever, provisions for an externally adjustable circuit  
controlling the MSB error, the differential linearity  
error at bipolar zero, makes the DLE at BPZ essen-  
tially zero and provides for high system performance.  
The I/V amplifier stage includes an output current  
limiting circuit to protect both amplifier and load from  
excessive current. This assures the user of high system  
reliability.  
RF  
16-Bit  
IOUT DAC  
Reference  
Output  
16-Bit Input Latch  
16-Bit Serial-to-Parallel Conversion  
Clock LE Data  
International Airport Industrial Park  
Mailing Address: PO Box 11400, Tucson, AZ 85734  
FAXLine: (800) 548-6133 (US/Canada Only)  
• Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111  
Internet: http://www.burr-brown.com/  
Cable: BBRCORP  
Telex: 066-6491  
FAX: (520) 889-1510  
Immediate Product Info: (800) 548-6132  
®
PDS-1231A  
DAC56  

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