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CYWB0124AB

更新时间： 2024-01-27 08:53:54

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		存储控制器
页数	文件大小	规格书
2页	254K
描述
West Bridge™ : Antioch™ USB/Mass Storage Peripheral Controller

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技术参数
数据手册

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CYWB0124AB 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	包装说明：	FBGA, BGA81,9X9,16
Reach Compliance Code：	compliant	ECCN代码：	3A991.A.3
HTS代码：	8542.31.00.01	风险等级：	5.72
JESD-30 代码：	S-PBGA-B81	湿度敏感等级：	1
端子数量：	81	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	FBGA	封装等效代码：	BGA81,9X9,16
封装形状：	SQUARE	封装形式：	GRID ARRAY, FINE PITCH
电源：	1.8,1.8/3.3 V	认证状态：	Not Qualified
子类别：	Bus Controllers	表面贴装：	YES
温度等级：	INDUSTRIAL	端子形式：	BALL
端子节距：	0.4 mm	端子位置：	BOTTOM
Base Number Matches：	1

CYWB0124AB 数据手册

CYWB0124AB

West Bridge™ : Antioch™ USB/Mass

Storage Peripheral Controller

• Memory-mapped interface to main processor

• DMA slave support

1.0 Features

• SLIM™ Architecture, allowing simultaneous and

independent data paths between Processor & USB and

between USB & Mass Storage

• Ultra low-power, 1.8V core operation

• Low Power Modes

• Small footprint, 6x6mm VFBGA

• Selectable Clock Input Frequencies

— 19.2 MHz, 24 MHz, 26 MHz, 48 MHz

• High-Speed USB at 480 Mbps

— USB 2.0 compliant

— Integrated USB 2.0 transceiver, smart Serial Interface

Engine

2.0 Applications

— 16 programmable endpoints

• Mass Storage device support

— MMC/MMC+/SD

• Cellular Phones

• Portable Media Players

• Personal Digital Assistants

• Digital Cameras

— NAND flash: x8 or x16, SLC

— Full NAND management (ECC, wear-leveling)

• Portable Video Recorder

Figure 1-1. West Bridge Antioch Block Diagram

West Bridge Antioch

8051 MCU

Control Registers

Access Control

SLIM^TM

Mass Storage Interface

SD/MMC/CE-ATA

NAND

With this architecture, connecting a device using Antioch to a

PC through USB does not disturb any of the functions of the

device, which can still access Mass storage at the same time

the PC is synchronizing with the main processor.

3.0 Functional Overview

3.1The SLIM™ architecture

The Simultaneous Link to Independent Multimedia (SLIM)

architecture allows three different interfaces (the P-port, the

S-port and the U-port) to connect to one-another indepen-

dently.

The SLIM architecture enables new usage models, in which a

PC can access a Mass storage device independent of the

main processor, or enumerate access to both the mass

storage and the main processor at the same time.

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised October 24, 2006

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CYWB0124AB_09	CYPRESS	West Bridge,Antioch,USB/Mass Storage Peripheral Controller	获取价格
CYWB0124AB-BVXI	CYPRESS	West Bridge Antioch Memory-mapped interface to main processor	获取价格
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