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CYV15G0101DXB

更新时间： 2024-01-13 05:46:15
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
39页 456K
描述
Single-channel HOTLink Transceiver

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CYV15G0101DXB 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：0.150 INCH, ROHS COMPLIANT, MS-012, SOIC-16
针数：16Reach Compliance Code：unknown
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.75JESD-30 代码：R-PDSO-G16
JESD-609代码：e4长度：9.893 mm
湿度敏感等级：3功能数量：1
端子数量：16最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.727 mm
标称供电电压：3.3 V表面贴装：YES
技术：CMOS电信集成电路类型：TELECOM CIRCUIT
温度等级：COMMERCIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：20
宽度：3.899 mmBase Number Matches：1

CYV15G0101DXB 数据手册

 浏览型号CYV15G0101DXB的Datasheet PDF文件第2页浏览型号CYV15G0101DXB的Datasheet PDF文件第3页浏览型号CYV15G0101DXB的Datasheet PDF文件第4页浏览型号CYV15G0101DXB的Datasheet PDF文件第5页浏览型号CYV15G0101DXB的Datasheet PDF文件第6页浏览型号CYV15G0101DXB的Datasheet PDF文件第7页 
CYP15G0101DXB  
CYV15G0101DXB  
Single-channel HOTLink II™ Transceiver  
• Compatible with  
Features  
— fiber-optic modules  
• Single-channeltransceiverfor195to1500MBaudserial  
— copper cables  
— circuit board traces  
• JTAG boundary scan  
• Built-In Self-Test (BIST) for at-speed link testing  
• Per-channel Link Quality Indicator  
— Analog signal detect  
— Digital signal detect  
• Low power 1.25W @ 3.3V typical  
• Single 3.3V supply  
• 100-ball BGA  
• 0.25ꢁ BiCMOS technology  
signaling rate  
• Second-generation HOTLink® technology  
• Compliant to multiple standards  
— ESCON, DVB-ASI, Fibre Channel and Gigabit  
Ethernet (IEEE802.3z)  
— CYV15G0101DXB also compliant to SMPTE 259M  
and SMPTE 292M  
— 8B/10B encoded or 10-bit unencoded data  
• Selectable parity check/generate  
• Selectable input clocking options  
• Selectable output clocking options  
• MultiFrame™ Receive Framer  
Functional Description  
— Bit and Byte alignment  
— Comma or full K28.5 detect  
The CYP(V)15G0101DXB[1] single-channel HOTLink II™  
transceiver is a point-to-point communications building block  
allowing the transfer of data over a high-speed serial link  
(optical fiber, balanced, and unbalanced copper transmission  
lines) at signaling speeds ranging from 195 to 1500 MBaud.  
— Single- or Multi-Byte framer for byte alignment  
— Low-latency option  
• Synchronous LVTTL parallel input and parallel output  
interface  
The transmit channel accepts parallel characters in an Input  
Register, encodes each character for transport, and converts  
it to serial data. The receive channel accepts serial data and  
converts it to parallel data, frames the data to character bound-  
aries, decodes the framed characters into data and special  
characters, and presents these characters to an Output  
Register. Figure 1 illustrates typical connections between  
• Internal phase-locked loops (PLLs) with no external  
PLL components  
• Dual differential PECL-compatible serial inputs  
— Internal DC-restoration  
• Dual differential PECL-compatible serial outputs  
— Source matched for driving 50ꢀ transmission lines  
— No external bias resistors required  
— Signaling-rate controlled edge-rates  
• Optional Elasticity Buffer in Receive Path  
• Optional Phase Align Buffer in Transmit Path  
independent  
host  
systems  
and  
corresponding  
CYP(V)15G0101DXB parts. As a second-generation HOTLink  
device, the CYP(V)15G0101DXB extends the HOTLink II  
family with enhanced levels of integration and faster data  
rates, while maintaining serial-link compatibility (data,  
command, and BIST) with other HOTLink devices.  
10  
10  
10  
Serial Link  
10  
Backplane or Cabled  
Connections  
Figure 1. HOTLink II System Connections  
Note:  
1. CYV15G0101DXB refers to SMPTE 259M and SMPTE 292M compliant devices.  
CYP15G0101DXB refers to devices not compliant to SMPTE 259M and SMPTE 292M pathological test requirements.  
CYP(V)15G0101DXB refers to both devices.  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose, CA 95134  
•
408-943-2600  
Document #: 38-02031 Rev. *I  
Revised March 16, 2004  
1234567...39

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