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CYII5SM1300AA-QBC PDF预览

CYII5SM1300AA-QBC

更新时间: 2024-01-12 03:39:37
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 传感器图像传感器
页数 文件大小 规格书
35页 1740K
描述
CMOS Sensor, 27fps, 0.50-2.20V, Square, Surface Mount, CERAMIC, LCC-84

CYII5SM1300AA-QBC 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
风险等级:5.3其他特性:ELECTRONIC SNAPSHOT SHUTTER, ROLLING SHUTTER
阵列类型:FULL FRAME主体宽度:9.29 mm
主体高度:0.83 mm主体长度或直径:10.15 mm
数据速率:40 Mbps动态范围:64 dB
帧速率:27 fps水平像素:1280
外壳:CERAMIC主时钟:40 MHz
安装特点:SURFACE MOUNT最大工作电流:60 mA
最高工作温度:65 °C最低工作温度:-30 °C
光学格式:2/3 inch输出接口类型:I2C INTERFACE
输出范围:0.50-2.02V输出类型:DIGITAL VOLTAGE
封装形状/形式:RECTANGULAR像素大小:6.7X6.7 µm
灵敏度(V / lx.s):8.4 V/lx.s传感器/换能器类型:IMAGE SENSOR,CMOS
最大供电电压:4.5 V最小供电电压:3 V
表面贴装:YES端接类型:SOLDER
垂直像素:1024Base Number Matches:1

CYII5SM1300AA-QBC 数据手册

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CYII5SM1300AB  
IBIS5 1.3 Megapixel CMOS Image Sensor  
Features  
Description  
1280 × 1024 active pixels  
6.7 μm × 6.7 μm square pixels  
2/3” optical format  
The IBIS5-B-1300 is a solid state CMOS image sensor that  
integrates the functionality of complete analog image acquisition,  
digitizer, and digital signal processing system on a single chip.  
This 1.3-mega pixel (1280 × 1024) CMOS active pixel sensor  
dedicated to industrial vision applications features both rolling  
and snapshot (or global) shutter. Full frame readout time is 36 ms  
(max. 27.5 fps), and readout speed are boosted by windowed  
region of interest (ROI) readout. Another feature includes the  
double and multiples slope functionality to capture high dynamic  
range scenes. The sensor is available in a monochrome version  
or Bayer (RGB) patterned color filter array.  
Global and rolling shutter  
Master clock: 40 MHz  
27 fps (1280 × 1024) and 106 fps (640 × 480)  
On-chip 10-bit ADCs  
Serial peripheral interface (SPI)  
Windowing (ROI)  
User programmable row and column start/stop positions allow  
windowing down to a 2×1 pixel window for digital zoom. Sub  
sampling or viewfinder mode reduces resolution while  
maintaining the constant field of view and an increased frame  
rate. An on-chip analog signal pipeline processes the analog  
video output of the pixel array. Double sampling (DS) eliminates  
the fixed pattern noise. The programmable gain and offset  
amplifier maps the signal swing to the ADC input range. A 10-bit  
ADC converts the analog data to a 10-bit digital word stream. The  
sensor uses a 3-wire serial peripheral interface (SPI), or a 16-bit  
parallel interface. It operates with a 3.3 V power supply and  
requires only one master clock for operation up to 40 MHz. It is  
housed in an 84-pin ceramic LCC package.  
Sub-sampling: 1:2 mode  
Supply voltage  
Analog: 3.0 V to 4.5 V  
Digital: 3.3 V  
I/O: 3.3 V  
Power consumption: 200 mW  
0 °C to +65 °C operating temperature range  
84-pin LCC package  
Figure 1. IBIS5-B-1300 Photo  
Applications  
Machine vision  
Inspection  
Robotics  
Traffic monitoring  
Ordering Information  
See Ordering Code Information on page 33 for more information.  
Marketing Part Number Description  
CYII5SM1300AB-QDC  
Package  
Mono with glass  
Mono without glass  
CYII5SM1300AB-QWC  
CYII5SC1300AB-QDC  
CYII5FM1300AB-QDC  
84-pin LCC  
Color with glass  
Mono with thicker epi with glass  
Cypress Semiconductor Corporation  
Document #: 38-05710 Rev. *H  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised January 13, 2011  
[+] Feedback  

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