Datasheet > CY8C4245AXI-483

CY8C4245AXI-483

更新时间： 2024-02-04 00:49:30

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		时钟外围集成电路
页数	文件大小	规格书
45页	953K
描述
Multifunction Peripheral, CMOS, PQFP44, TQFP-44

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CY8C4245AXI-483 技术参数

是否Rohs认证：	符合	生命周期：	Active
零件包装代码：	QFP	包装说明：	LQFP, QFP44,.47SQ,32
针数：	44	Reach Compliance Code：	compliant
ECCN代码：	3A991.A.3	HTS代码：	8542.31.00.01
Factory Lead Time：	1 week	风险等级：	1.53
边界扫描：	NO	总线兼容性：	I2C; IDE; IRDA; LIN; SPI; UART
最大时钟频率：	48 MHz	JESD-30 代码：	S-PQFP-G44
JESD-609代码：	e3	长度：	10 mm
湿度敏感等级：	3	I/O 线路数量：	36
串行 I/O 数：	3	端子数量：	44
最高工作温度：	105 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	LQFP
封装等效代码：	QFP44,.47SQ,32	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE	认证状态：	Not Qualified
RAM（字数）：	2048	座面最大高度：	1.6 mm
最大压摆率：	13.8 mA	最大供电电压：	5.5 V
最小供电电压：	1.71 V	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	宽度：	10 mm
uPs/uCs/外围集成电路类型：	MULTIFUNCTION PERIPHERAL	Base Number Matches：	1

CY8C4245AXI-483 数据手册

PSoC^®4: PSoC 4200

Family Datasheet

Programmable System-on-Chip (PSoC^®)

General Description

PSoC^®4 is a scalable and reconfigurable platform architecture for a family of mixed-signal programmable embedded system

controllers with an ARM^®Cortex™-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible

automatic routing. The PSoC 4200 product family, based on this platform, is a combination of a microcontroller with digital program-

mable logic, high-performance analog-to-digital conversion, opamps with Comparator mode, and standard communication and timing

peripherals. The PSoC 4200 products will be fully upward compatible with members of the PSoC 4 platform for new applications and

design needs. The programmable analog and digital sub-systems allow flexibility and in-field tuning of the design.

Features

32-bit MCU Sub-system

Serial Communication

■ 48-MHz ARM Cortex-M0 CPU with single cycle multiply

■ Up to 32 kB of flash with Read Accelerator

■ Up to 4 kB of SRAM

■ Two independent run-time reconfigurable serial communi-

cation blocks (SCBs) with reconfigurable I²C, SPI, or UART

functionality

Timing and Pulse-Width Modulation

Programmable Analog

■ Four 16-bit timer/counter pulse-width modulator (TCPWM)

blocks

■ Two opamps with reconfigurable high-drive external and

high-bandwidth internal drive, Comparator modes, and ADC

input buffering capability

■ Center-aligned, Edge, and Pseudo-random modes

■ 12-bit, 1-Msps SAR ADC with differential and single-ended

modes; Channel Sequencer with signal averaging

■ Comparator-based triggering of Kill signals for motor drive and

other high-reliability digital logic applications

■ Two current DACs (IDACs) for general-purpose or capacitive

sensing applications on any pin

Up to 36 Programmable GPIOs

■ Two low-power comparators that operate in Deep Sleep mode

■ Any GPIO pin can be CapSense, LCD, analog, or digital

■ Drive modes, strengths, and slew rates are programmable

Programmable Digital

■ Four programmable logic blocks called universal digital blocks,

(UDBs), each with 8 Macrocells and data path

Five different packages

■ 48-pin TQFP, 44-pin TQFP, 40-pin QFN, 35-ball WLCSP, and

28-pin SSOP package

■ Cypress-provided peripheral component library, user-defined

state machines, and Verilog input

■ 35-ball WLCSP package is shipped with I²C Bootloader in

Flash

Low Power 1.71-V to 5.5-V Operation

■ 20-nA Stop Mode with GPIO pin wakeup

Extended Industrial Temperature Operation

■ Hibernate and Deep Sleep modes allow wakeup-time versus

power trade-offs

■ –40 °C to + 105 °C operation

PSoC Creator Design Environment

Capacitive Sensing

■ Integrated Development Environment (IDE) provides

schematic design entry and build (with analog and digital

automatic routing)

■ Cypress CapSense Sigma-Delta (CSD) provides best-in-class

SNR (>5:1) and water tolerance

■ Cypress-supplied software component makes capacitive

sensing design easy

■ Applications Programming Interface (API) component for all

fixed-function and programmable peripherals

■ Automatic hardware tuning (SmartSense™)

Industry-Standard Tool Compatibility

Segment LCD Drive

■ After schematic entry, development can be done with

ARM-based industry-standard development tools

■ LCD drive supported on all pins (common or segment)

■ Operates in Deep Sleep mode with 4 bits per pin memory

Cypress Semiconductor Corporation

Document Number: 001-87197 Rev. *J

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised July 10, 2017

12 3 4 5 6 7...45

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与CY8C4245AXI-483相关器件

型号	品牌	描述	获取价格	数据表
CY8C4245AXI-M445	CYPRESS	Programmable System-on-Chip	获取价格
CY8C4245AXI-M445	INFINEON	32位PSoC? 4 Arm? Cortex?-M0/M0+	获取价格
CY8C4245AXQ-473	CYPRESS	Programmable System-on-Chip (PSoCÂ®)	获取价格
CY8C4245AXQ-473	INFINEON	32位PSoC? 4 Arm? Cortex?-M0/M0+	获取价格
CY8C4245AXQ-483	CYPRESS	Programmable System-on-Chip (PSoCÂ®)	获取价格
CY8C4245AXQ-483	INFINEON	32位PSoC? 4 Arm? Cortex?-M0/M0+	获取价格

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