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CYBUS3L384QC PDF预览

CYBUS3L384QC

更新时间: 2024-11-27 19:44:23
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
8页 186K
描述
Bus Driver, 2-Func, 5-Bit, True Output, CMOS, PDSO24, 0.150 INCH, QSOP-24

CYBUS3L384QC 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SSOP, SSOP24,.24针数:24
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.26其他特性:TTL COMPATIBLE BUS SWITCH
JESD-30 代码:R-PDSO-G24JESD-609代码:e0
长度:8.65 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:5功能数量:2
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP24,.24封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):240
电源:5 V传播延迟(tpd):0.25 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9 mmBase Number Matches:1

CYBUS3L384QC 数据手册

 浏览型号CYBUS3L384QC的Datasheet PDF文件第2页浏览型号CYBUS3L384QC的Datasheet PDF文件第3页浏览型号CYBUS3L384QC的Datasheet PDF文件第4页浏览型号CYBUS3L384QC的Datasheet PDF文件第5页浏览型号CYBUS3L384QC的Datasheet PDF文件第6页浏览型号CYBUS3L384QC的Datasheet PDF文件第7页 
1CYBUS3L384  
CYBUS3384  
CYBUS3L384  
Dual 5-Bit Bus Switch  
Features  
Functional Description  
• Zero propagation delay  
The CYBUS3384 and CYBUS3L384 are ten-bit, two-port bidi-  
rectional bus switches that allow one bus to be connected di-  
rectly to, or isolated from, another without introducing addition-  
al propagation delay or ground noise. The input and output  
voltage levels allow direct interface with TTL and CMOS de-  
• 2switches connect inputs to outputs  
• Direct bus connection when switches are ON  
• High (>500 Meg ) resistance when switch is OFF  
• Performs bidirectional translator function between  
3.3V and 5.0V power supplies  
• CMOS for low power dissipation  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
vices. Two bus enable signals, BE and BE , turn on the upper  
1
2
and lower five bits, respectively.  
Designed with a low resistance of 2, the CYBUS3384 and  
CYBUS3L384 are ideal for use in VME or other high DC drive  
applications.  
• Inputs and outputs interface with 5.0V CMOS, TTL, or  
3.3V CMOS  
• ESD > 2000V  
The power-off disable feature enables modules and cards to  
be either inserted or withdrawn from operating equipment  
without shutting down power. Additionally, they facilitate bidi-  
rectional interfacing between 3.3V and 5V systems by placing  
• Power-off disable  
a single diode in series with the 5V V line and a resistor from  
pin 24 to ground.  
CC  
CYBUS3L384  
• Low power version  
The CYBUS3384 and CYBUS3L384 are also suitable for  
small signal analog application where crosstalk and off isola-  
tion performance of –66 dB at 50 MHz is required.  
The CYBUS3L384 is a low-power version of the CYBUS3384  
with a typical I of 0.2 µA.  
CC  
Logic Block Diagram  
Pin Configurations  
BE  
1
DIP/SOIC/QSOP  
Top View  
BE  
2
1
BE  
1
24  
V
CC  
A
B
B
B
0
0
1
2
2
3
4
5
6
B
B
9
23  
22  
21  
0
A
0
A
9
A
1
A
8
A
1
B
B
1
20  
19  
18  
17  
16  
A
2
8
B
A
B
2
7
A
3
A
7
B
B
2
7
8
9
3
4
A
3
A
6
A
4
B
3
4
B
6
B
10  
11  
12  
B
A
5
15  
14  
A
5
B
B
B
5
6
A
4
5
GND  
BE  
2
13  
A
6
BUS3384-2  
A
7
7
8
9
A
8
B
B
BUS3384-1  
A
9
Function Table[1]  
Pin Description  
Inputs  
Name  
Description  
BE  
H
L
BE  
H
H
L
B
B
Function  
Non-connect  
Connect  
A
B
Bus A, Inputs or Outputs  
Bus B, Inputs or Outputs  
Bus Switch Enable  
1
2
0–4  
5–9  
High-Z  
High-Z  
A
High-Z  
BE , BE  
0–4  
1
2
H
L
High-Z  
A
A
Connect  
5–9  
L
A
Connect  
0–4  
5–9  
Note:  
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
May 1994 – Revised March 1996  
408-943-2600  

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