CY8C21123, CY8C21223, CY8C21323
PSoC® Programmable System-on-Chip™
PSoC® Programmable System-on-Chip™
■ Additional system resources:
Features
❐ I2C master, slave and multi-master to 400 kHz
❐ Watchdog and sleep timers
■ Powerful Harvard-architecture processor:
❐ M8C processor speeds up to 24 MHz
❐ Low power at high speed
❐ User-configurable low-voltage detection (LVD)
❐ Integrated supervisory circuit
❐ Operating voltage: 2.4 V to 5.25 V
❐ On-chip precision voltage reference
❐ Operating voltages down to 1.0 V using on-chip switch mode
pump (SMP)
❐ Industrial temperature range: –40 °C to +85 °C
■ Advanced peripherals (PSoC® blocks):
❐ Four analog type “E” PSoC blocks provide:
• Two comparators with digital to analog converter (DAC)
references
Logic Block Diagram
Port 1 Port 0
PSoC
CORE
• Single or dual 10-Bit 8-to-1 analog to digital converter
(ADC)
SystemBus
❐ Four digital PSoC blocks provide:
• 8- to 32-bit timers, counters, and pulse width modulators
(PWMs)
Global Digital Interconnect
Global Analog Interconnect
Flash
SROM
• CRC and PRS modules
SRAM
❐ Full duplex UART, SPI™ master or slave: Connectable to all
CPUCore
(M8C)
Sleep and
Watchdog
Interrupt
Controller
general-purpose I/O (GPIO) pins
❐ Complex peripherals by combining blocks
Clock Sources
(Includes IMO and ILO)
■ Flexible on-chip memory:
❐ 4 KB flash program storage 50,000 erase/write cycles
❐ 256 bytes SRAM data storage
❐ In-system serial programming (ISSP)
❐ Partial flash updates
❐ Flexible protection modes
❐ EEPROM emulation in flash
DIGITAL SYSTEM
ANALOG SYSTEM
Analog
Ref .
Digital
PSoC Block
Array
Analog
PSoC Block
Array
■ Complete development tools:
❐ Free development software (PSoC Designer™)
❐ Full-featured, in-circuit emulator (ICE) and programmer
❐ Full-speed emulation
❐ Complex breakpoint structure
❐ 128-KB trace memory
Sw itch
Mode
Pump
POR and LVD
System Resets
Internal
Voltage
Ref .
Digital
Clocks
I2C
■ Precision, programmable clocking:
❐ Internal ±2.5% 24- / 48-MHz main oscillator
❐ Internal low-speed, low-power oscillator for watchdog and
sleep functionality
SYSTEM RESOURCES
■ Programmable pin configurations:
❐ 25-mA sink, 10-mA source on all GPIOs
❐ Pull-up, pull-down, high Z, strong, or open-drain drive modes
on all GPIOs
❐ Up to eight analog inputs on all GPIOs
❐ Configurable interrupt on all GPIOs
Cypress Semiconductor Corporation
Document Number: 38-12022 Rev. *Q
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised June 1, 2011
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