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CY7C65620-56LFXC PDF预览

CY7C65620-56LFXC

更新时间: 2024-11-24 04:53:39
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 总线控制器微控制器和处理器外围集成电路时钟
页数 文件大小 规格书
24页 542K
描述
EZ-USB HX2LP⑩ Low-Power USB 2.0 Hub Controller Family

CY7C65620-56LFXC 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:HVQCCN, LCC56,.31SQ,20
针数:56Reach Compliance Code:unknown
HTS代码:8542.31.00.01Factory Lead Time:1 week
风险等级:5.1Is Samacsys:N
地址总线宽度:最大时钟频率:24 MHz
外部数据总线宽度:JESD-30 代码:S-XQCC-N56
JESD-609代码:e3长度:8 mm
湿度敏感等级:3端子数量:56
最高工作温度:70 °C最低工作温度:
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC56,.31SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Bus Controllers
最大压摆率:190 mA最大供电电压:3.45 V
最小供电电压:3.15 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:8 mmuPs/uCs/外围集成电路类型:BUS CONTROLLER, UNIVERSAL SERIAL BUS
Base Number Matches:1

CY7C65620-56LFXC 数据手册

 浏览型号CY7C65620-56LFXC的Datasheet PDF文件第2页浏览型号CY7C65620-56LFXC的Datasheet PDF文件第3页浏览型号CY7C65620-56LFXC的Datasheet PDF文件第4页浏览型号CY7C65620-56LFXC的Datasheet PDF文件第5页浏览型号CY7C65620-56LFXC的Datasheet PDF文件第6页浏览型号CY7C65620-56LFXC的Datasheet PDF文件第7页 
CY7C656xx  
EZ-USB HX2LP™  
Low-Power USB 2.0 Hub Controller Family  
• In-system EEPROM programming  
Features  
• Configurable with external SPI EEPROM:  
— Vendor ID, Product ID, Device ID (VID/PID/DID)  
• USB 2.0 hub controller  
• Automotive AEC grade option (–40 - 85C)  
• Compliant with the USB 2.0 specification  
• USB-IF Certified: TID# 30000009  
— Number of active ports  
— Number of removable ports  
— Maximum power setting for high-speed and full-speed  
— Hub controller power setting  
— Power on timer  
• Windows Hardware Quality Lab (WHQL) - compliant  
• Up to four downstream ports supported  
• Supports bus powered and self powered modes  
• Single Transaction Translator (TT)  
— Overcurrent detection mode  
— Enabled/disabled overcurrent timer  
— Overcurrent pin polarity  
• Bus power configurations  
• Fit/form/function compatible with CY7C65640 and  
CY7C65640A (TetraHub™)  
— Indicator pin polarity  
• Space saving 56-pin QFN  
— Compound device  
• Single power supply requirement  
— Enable full-speed only  
— Internal regulator for reduced cost  
— Disable port indicators  
• Integrated upstream pull up resistor  
— Ganged power switching  
— Self and bus powered compatibility  
• Integrated pull down resistors for all downstream ports  
• Integrated upstream and downstream termination resistors  
• Integrated port status indicator control  
• 24 MHz external crystal (integrated PLL)  
— Fully configurable string descriptors for multiple  
language support  
Block Diagram  
CY7C65630  
D+  
D -  
High-Speed  
USB Control Logic  
USB 2.0 PHY  
PLL  
Serial  
Interface  
Engine  
24 MHz  
Crystal  
SPI_SCK  
SPI_SD  
SPI Communication  
Block  
SPI_CS  
USB Upstream Port  
Transaction Translator  
TT RAM  
Hub Repeater  
Routing Logic  
USB Downstream Port 1  
USB Downstream Port 2  
USB Downstream Port 3  
USB Downstream Port 4  
USB 2.0  
PHY  
Port  
Status  
Port Power  
Control  
USB 2.0 Port Power  
PHY  
Control  
Port  
Status  
USB 2.0 Port Power  
PHY  
Control  
Port  
Status  
USB 2.0 Port Power  
PHY  
Control  
Port  
Status  
D+ D- PWR#[4]  
LED  
D+ D- PWR#[3]  
OVR#[3]  
LED  
D+ D- PWR#[1]  
OVR#[1]  
LED D+ D- PWR#[2]  
LED  
OVR#[2]  
OVR#[4]  
Cypress Semiconductor Corporation  
Document #: 38-08037 Rev. *H  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised May 3, 2007  
[+] Feedback  

CY7C65620-56LFXC 替代型号

型号 品牌 替代类型 描述 数据表
CY7C65630-56LTXC CYPRESS

完全替代

EZ-USB HX2LP Low Power USB 2.0 Hub Controller Family
CY7C65620-56LTXC CYPRESS

完全替代

EZ-USB HX2LP Low Power USB 2.0 Hub Controller Family
CY7C65640A-LFXC CYPRESS

完全替代

TetraHub⑩ High-Speed USB Hub Controller

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