Datasheet > 存储 > FIFO> CY7C472-15JC

CY7C472-15JC

更新时间： 2024-11-26 22:36:27

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		先进先出芯片
页数	文件大小	规格书
15页	272K
描述
8K x 9 FIFO, 16K x 9 FIFO 32K x 9 FIFO with Programmable Flags

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中文翻译

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数据手册
替代型号

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CY7C472-15JC 数据手册

1CY7C474

CY7C470

CY7C472

CY7C474

8K x 9 FIFO, 16K x 9 FIFO

32K x 9 FIFO with Programmable Flags

offered in 600-mil DIP, PLCC, and LCC packages. Each FIFO

memory is organized such that the data is read in the same

Features

• 8K x 9, 16K x 9, and 32K x 9 FIFO buffer memory

• Asynchronous read/write

• High-speed 33.3-MHz read/write independent of

depth/width

sequential order that it was written. Three status pins—Emp-

ty/Full (E/F), Programmable Almost Full/Empty (PAFE), and

Half Full (HF)—are provided to the user. These pins are de-

coded to determine one of six states: Empty, Almost Empty,

Less than Half Full, Greater than Half Full, Almost Full, and

Full.

• Low operating power

— I (max.) = 70 mA

The read and write operations may be asynchronous; each

can occur at a rate of 33.3 MHz. The write operation occurs

when the write (W) signal goes LOW. Read occurs when read

(R) goes LOW. The nine data outputs go into a high-imped-

ance state when R is HIGH.

• Programmable Almost Full/Empty flag

• Empty, Almost Empty, Half Full, Almost Full, and Full

status flags

• Programmable retransmit

• Expandable in width

• 5V ± 10% supply

The user can store the value of the read pointer for retransmit

by using the MARK pin. A LOW on the retransmit (RT) input

causes the FIFO to resend data by resetting the read pointer

to the value stored in the mark pointer.

• TTL compatible

• Three-state outputs

In the standalone and width expansion configurations, a LOW

on the retransmit (RT) input causes the FIFO to resend the

data. With the mark feature, retransmit can start from any word

in the FIFO.

• Proprietary 0.8-micron CMOS technology

Functional Description

The CYC47X FIFO series consists of high-speed, low-power,

first-in first-out (FIFO) memories with programmable flags and

retransmit mark. The CY7C470, CY7C472, and CY7C474 are

8K, 16K, and 32K words by 9 bits wide, respectively. They are

The CYC47X series is fabricated using a proprietary 0.8-mi-

cron N-well CMOS technology. Input ESD protection is greater

than 2001V and latch-up is prevented by the use of reliable

layout techniques, guard rings, and a substrate bias generator.

Logic Block Diagram

Pin Configurations

DATAINPUTS

(D –D )

DIP

PLCC/LCC

Top View

32 31 30

PROGRAMMABLE

FLAG REGISTER

7C470

7C472

7C474

7C470

7C472

7C474

MARK

PAFE

E/F

MARK

PAFE

E/F

FLAG

LOGIC

E/F

PAFE

RAM ARRAY

8K x 9

16K x 9

WRITE

POINTER

READ

POINTER

14 15 16 17 18 19 20

MARK

32K x 9

GND

7C470–2

MARK

POINTER

7C470–3

THREE–

STATE

BUFFERS

DATAOUTPUTS

(Q –Q )

RESET

LOGIC

7C470–1

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

December 1990 – Revised April 1995

12 3 4 5 6 7...15

中文翻译

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CY7C472-15JC 替代型号

型号	品牌	替代类型	描述	数据表
CY7C4261-15JC	CYPRESS	完全替代	16K/32K x 9 Deep Sync FIFOs
CY7C4261-10JXI	CYPRESS	功能相似	16K/32K x 9 Deep Sync FIFOs
CY7C462A-10JI	CYPRESS	功能相似	Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs

与CY7C472-15JC相关器件

型号	品牌	获取价格	描述	数据表
CY7C472-15JCR	CYPRESS	获取价格	FIFO, 16KX9, 15ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32
CY7C472-15JI	CYPRESS	获取价格	8K x 9 FIFO, 16K x 9 FIFO 32K x 9 FIFO with Programmable Flags
CY7C472-15JIR	CYPRESS	获取价格	暂无描述
CY7C472-15LC	ETC	获取价格	x9 Asynchronous FIFO
CY7C472-15LMB	CYPRESS	获取价格	FIFO, 16KX9, 15ns, Asynchronous, CMOS, CQCC32, LCC-32
CY7C472-15PC	CYPRESS	获取价格	8K x 9 FIFO, 16K x 9 FIFO 32K x 9 FIFO with Programmable Flags
CY7C472-20DMB	CYPRESS	获取价格	8K x 9 FIFO, 16K x 9 FIFO 32K x 9 FIFO with Programmable Flags
CY7C472-20LMB	CYPRESS	获取价格	8K x 9 FIFO, 16K x 9 FIFO 32K x 9 FIFO with Programmable Flags
CY7C472-25DC	CYPRESS	获取价格	FIFO, 16KX9, 25ns, Asynchronous, CMOS, CDIP28, 0.600 INCH, CERDIP-28
CY7C472-25DI	ETC	获取价格	x9 Asynchronous FIFO

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