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CY7C274-35DMB PDF预览

CY7C274-35DMB

更新时间： 2024-01-02 03:49:22
品牌 Logo 应用领域
其他 - ETC 可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
15页 543K
描述
EPROM|32KX8|CMOS|DIP|28PIN|CERAMIC

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CY7C274-35DMB 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：WDFP, FL28,.4针数：28
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.32.00.61风险等级：5.48
Is Samacsys：N最长访问时间：35 ns
其他特性：POWER SWITCHED PROMI/O 类型：COMMON
JESD-30 代码：R-GDFP-F28长度：18.288 mm
内存密度：262144 bit内存集成电路类型：UVPROM
内存宽度：8功能数量：1
端子数量：28字数：32768 words
字数代码：32000工作模式：ASYNCHRONOUS
最高工作温度：125 °C最低工作温度：-55 °C
组织：32KX8输出特性：3-STATE
封装主体材料：CERAMIC, GLASS-SEALED封装代码：WDFP
封装等效代码：FL28,.4封装形状：RECTANGULAR
封装形式：FLATPACK, WINDOW并行/串行：PARALLEL
电源：5 V编程电压：12.5 V
认证状态：Not Qualified筛选级别：38535Q/M;38534H;883B
座面最大高度：2.54 mm最大待机电流：0.04 A
子类别：EPROMs最大压摆率：0.13 mA
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL宽度：9.144 mm
Base Number Matches：1

CY7C274-35DMB 数据手册

 浏览型号CY7C274-35DMB的Datasheet PDF文件第2页浏览型号CY7C274-35DMB的Datasheet PDF文件第3页浏览型号CY7C274-35DMB的Datasheet PDF文件第4页浏览型号CY7C274-35DMB的Datasheet PDF文件第5页浏览型号CY7C274-35DMB的Datasheet PDF文件第6页浏览型号CY7C274-35DMB的Datasheet PDF文件第7页 
74  
CY7C271  
CY7C274  
32K x 8 Power Switched and  
Reprogrammable PROM  
HIGH), the 7C271/7C274 automatically powers down into a  
low-power stand-by mode. The CY7C271 is packaged in the  
300-mil slim package. The CY7C274 is packaged in the indus-  
try standard 600-mil package. Both the 7C271 and 7C274 are  
available in a cerDIP package equipped with an erasure win-  
dow to provide for reprogrammability. When exposed to UV  
light, the PROM is erased and can be reprogrammed. The  
memory cells utilize proven EPROM floating gate technology  
and byte-wide intelligent programming algorithms.  
Features  
• CMOS for optimum speed/power  
• Windowed for reprogrammability  
• High speed  
— 30 ns (commercial)  
— 35 ns (military)  
• Low power  
The CY7C271 and CY7C274 offer the advantage of lower  
power, superior performance, and programming yield. The  
EPROM cell requires only 12.5V for the super voltage, and low  
current requirements allow for gang programming. The  
EPROM cells allow each memory location to be tested 100%  
because each location is written into, erased, and repeatedly  
exercised prior to encapsulation. Each PROM is also tested for  
AC performance to guarantee that after customer program-  
ming, the product will meet DC and AC specification limits.  
— 660 mW (commercial)  
— 715 mW (military)  
• Super low standby power  
— Less than 165 mW when deselected  
• EPROM technology 100% programmable  
• Slim 300-mil package (7C271)  
• Direct replacement for bipolar PROMs  
• Capable of withstanding >2001V static discharge  
Reading the 7C271 is accomplished by placing active LOW  
signals on CS1 and CE, and an active HIGH on CS2. Reading the  
7C274 is accomplished by placing active LOW signals on OE and  
CE. The contents of the memory location addressed by the address  
lines (A0 − A14) will become available on the output lines (O0 − O7).  
Functional Description  
The CY7C271 and CY7C274 are high-performance  
32,768-word by 8-bit CMOS PROMs. When disabled (CE  
Pin Configurations  
LogicBlockDiagram  
DIP/Flatpack  
DIP/Flatpack  
V
V
CC  
1
28  
1
28  
A
V
PP  
CC  
O
O
O
9
7
6
5
A
14  
A
10  
A
11  
A
12  
A
13  
A
14  
A
A
A
A
A
2
27  
26  
2
27  
26  
A
8
A
12  
14  
13  
8
A
13  
3
3
A
7
A
7
A
12  
X ADDRESS  
A
4
A
6
4
25  
24  
23  
22  
21  
25  
24  
23  
22  
21  
6
256 x 1024  
8 x 1 OF 128  
MULTIPLEXER  
A
11  
A
5
5
A
5
5
9
PROGRAMABLE  
ARRAY  
7C274  
7C271  
A
4
6
A
4
6
A
10  
11  
A
A
3
CS  
OE  
7
7
3
1
A
9
A
A
2
A
10  
8
8
CS  
2
2
A
8
A
1
A
1
CE  
9
9
20  
19  
18  
17  
16  
20  
19  
18  
17  
16  
CE  
A
7
A
0
A
0
10  
11  
12  
13  
10  
11  
12  
13  
O
O
O
O
7
7
O
4
O
3
A
O
O
O
O
6
0
6
0
6
O
O
O
O
5
O
4
O
3
1
1
5
4
3
A
5
O
2
O
2
A
4
14  
14  
GND  
GND  
15  
15  
A
3
Y ADDRESS  
A
2
LCC/PLCC (Opaque Only) LCC/PLCC (Opaque Only)  
O
O
2
A
1
4
4
3
A
0
3
2
3231 30  
2
323130  
1
1
A
A
A
NC  
CS  
CS  
CE  
A
8
12  
13  
14  
29  
29  
A
A
A
A
6
6
5
5
6
7
8
5
6
7
8
1
A
A
9
28  
27  
26  
25  
24  
23  
22  
21  
28  
27  
26  
25  
24  
23  
22  
21  
5
POWER–DOWN  
7C271  
7C274  
A
11  
A
4
4
NC  
OE  
A
A
3
3
A
A
2
1
2
2
9
9
O
0
A
10  
A
A
1
1
10  
11  
12  
13  
10  
11  
12  
13  
A
A
CE  
0
0
CE  
(7C271) CS  
O
O
6
O
7
NC  
O
NC  
7
1
O
6
O
0
0
(7C271) CS  
2
14151617 181920  
14151617 181920  
(7C274) OE  
Cypress Semiconductor Corporation  
Document #: 38-04008 Rev. **  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
Revised March 4, 2002  
1234567...15

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