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CY7C199CN-12VC PDF预览

CY7C199CN-12VC

更新时间: 2024-11-24 03:14:19
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
14页 608K
描述
256K (32K x 8) Static RAM

CY7C199CN-12VC 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOJ
包装说明:0.300 INCH, PLASTIC, MO-088 SOJ-28针数:28
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.81
最长访问时间:12 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-J28JESD-609代码:e0
长度:17.907 mm内存密度:262144 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
湿度敏感等级:1功能数量:1
端子数量:28字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装等效代码:SOJ28,.34封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
峰值回流温度(摄氏度):220电源:5 V
认证状态:Not Qualified座面最大高度:3.556 mm
最大待机电流:0.0005 A最小待机电流:4.5 V
子类别:SRAMs最大压摆率:0.085 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

CY7C199CN-12VC 数据手册

 浏览型号CY7C199CN-12VC的Datasheet PDF文件第2页浏览型号CY7C199CN-12VC的Datasheet PDF文件第3页浏览型号CY7C199CN-12VC的Datasheet PDF文件第4页浏览型号CY7C199CN-12VC的Datasheet PDF文件第5页浏览型号CY7C199CN-12VC的Datasheet PDF文件第6页浏览型号CY7C199CN-12VC的Datasheet PDF文件第7页 
CY7C199CN  
256K (32K x 8) Static RAM  
Features  
General Description [1]  
• Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns  
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)  
• CMOS for optimum speed and power  
• TTL-compatible inputs and outputs  
• 2.0V data retention  
The CY7C199CN is a high performance CMOS Asynchronous  
SRAM organized as 32K by 8 bits that supports an  
asynchronous memory interface. The device features an  
automatic power down feature that reduces power  
consumption when deselected.  
See the “Truth Table” on page 3 in this data sheet for a  
complete description of read and write modes.  
• Low CMOS standby power  
• Automated power down when deselected  
The CY7C199CN is available in Pb-free 28-pin TSOP I, 28-pin  
Molded SOJ and 28-pin DIP package(s).  
• Available in Pb-free 28-pin TSOP I, 28-pin Molded SOJ and  
28-pin DIP packages  
Logic Block Diagram  
Input Buffer  
RAM Array  
I/Ox  
CE  
WE  
OE  
Power  
Down  
Circuit  
Column Decoder  
A X  
X
Product Portfolio  
–12  
–15  
–20  
20  
–25  
25  
Unit  
ns  
Maximum Access Time  
12  
85  
15  
80  
Maximum Operating Current  
75  
75  
mA  
µA  
Maximum CMOS Standby Current  
(low power)  
500  
500  
500  
500  
Note  
1. For best practices recommendations, refer to the Cypress application note System Design Guidelines on www.cypress.com.  
Cypress Semiconductor Corporation  
Document #: 001-06435 Rev. *B  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised March 08, 2007  
[+] Feedback  

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