Datasheet > CY7C199CL-15ZXCT

CY7C199CL-15ZXCT

更新时间： 2024-12-02 10:44:11

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器光电二极管
页数	文件大小	规格书
13页	256K
描述
Standard SRAM, 32KX8, 15ns, CMOS, PDSO28, 8 X 13.40 MM, LEAD FREE, TSOP1-28

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CY7C199CL-15ZXCT 数据手册

CY7C199C

256K (32K x 8) Static RAM

Features

General Description

• Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns

• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)

• CMOS for optimum speed/power

• TTL–compatible Inputs and Outputs

• Available in 28 DIP, 28 SOJ, and 28 TSOP I packages

• Also available in Lead-Free 28 DIP

• 2.0V Data Retention

The CY7C199C is a high-performance CMOS Asynchronous

SRAM organized as 32K by 8 bits that supports an

asynchronous memory interface. The device features an

automatic power-down feature that significantly reduces

power consumption when deselected.

See the Truth Table in this data sheet for a complete

description of read and write modes.

The CY7C199C is available in 28 DIP, 28 SOJ, and 28 TSOP I

package(s).

• Low CMOS standby power

• Automated Power-down when deselected

Logic Block Diagram

Input Buffer

RAM Array

I/Ox

Power

Down

Circuit

Column Decoder

A _X

Product Portfolio

12 ns

15 ns

20 ns

25 ns

Unit

Maximum Access Time

Maximum Operating Current

500

µA

Maximum CMOS Standby Current

(low power)

Note:

1. For best-practices recommendations, please refer to the Cypress application note System Design Guidelines on www.cypress.com.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Document #: 38-05408 Rev. *B

Revised November 05, 2004

12 3 4 5 6 7...13

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