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CY7C199C-15ZCT PDF预览

CY7C199C-15ZCT

更新时间: 2024-12-02 09:45:51
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器光电二极管
页数 文件大小 规格书
13页 298K
描述
Standard SRAM, 32KX8, 15ns, CMOS, PDSO28, 8 X 13.40 MM, TSOP1-28

CY7C199C-15ZCT 数据手册

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CY7C199C  
256K (32K x 8) Static RAM  
Features  
General Description  
• Fast access time: 12 ns  
The CY7C199C is a high-performance CMOS Asynchronous  
SRAM organized as 32K by 8 bits that supports an  
asynchronous memory interface. The device features an  
automatic power-down feature that significantly reduces  
power consumption when deselected.  
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)  
• CMOS for optimum speed/power  
• TTL–compatible Inputs and Outputs  
• 2.0V Data Retention  
See the Truth Table in this data sheet for a complete  
description of read and write modes  
• Low CMOS standby power  
• Automated Power-down when deselected  
• Available in Pb-free and non Pb-free 28-pin (300-Mil)  
Molded SOJ, 28-pin (300-Mil) DIP and 28-pin TSOP I  
packages  
Logic Block Diagram  
Input Buffer  
32K x 8  
ARRAY
I/Ox  
CE  
WE  
OE  
Power  
Down  
Circuit  
Column Decoder  
A X  
X
Product Portfolio  
12 ns  
15 ns  
15  
20 ns  
20  
Unit  
ns  
Maximum Access Time  
12  
85  
Maximum Operating Current  
Maximum CMOS Standby Current (L)  
80  
75  
mA  
µA  
500  
Note:  
1. For best-practices recommendations, please refer to the Cypress application note System Design Guidelines on www.cypress.com.  
Cypress Semiconductor Corporation  
Document #: 38-05408 Rev. *C  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised August 3, 2006  

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