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CY7C199C-15VXC PDF预览

CY7C199C-15VXC

更新时间: 2024-11-30 13:07:11
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
12页 118K
描述
Standard SRAM, 32KX8, 15ns, CMOS, PDSO28, 0.300 INCH, LEAD FREE, MO-088, SOJ-28

CY7C199C-15VXC 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOJ
包装说明:0.300 INCH, LEAD FREE, MO-088, SOJ-28针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.58
最长访问时间:15 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-J28JESD-609代码:e4
长度:17.907 mm内存密度:262144 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:28字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装等效代码:SOJ28,.34封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:3.556 mm
最大待机电流:0.01 A最小待机电流:4.5 V
子类别:SRAMs最大压摆率:0.08 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:7.5057 mm
Base Number Matches:1

CY7C199C-15VXC 数据手册

 浏览型号CY7C199C-15VXC的Datasheet PDF文件第2页浏览型号CY7C199C-15VXC的Datasheet PDF文件第3页浏览型号CY7C199C-15VXC的Datasheet PDF文件第4页浏览型号CY7C199C-15VXC的Datasheet PDF文件第5页浏览型号CY7C199C-15VXC的Datasheet PDF文件第6页浏览型号CY7C199C-15VXC的Datasheet PDF文件第7页 
CY7C199C  
32K x 8 Static RAM  
1
Features  
General Description  
• Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns  
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)  
• CMOS for optimum speed/power  
• TTL–compatible Inputs and Outputs  
• Available in 28 DIP, 28 SOJ, and 28 TSOP I.  
• 2.0V Data Retention  
The CY7C199C is a high–performance CMOS Asynchronous  
SRAM organized as 32K by 8 bits that supports an  
asynchronous memory interface. The device features an  
automatic power–down feature that significantly reduces  
power consumption when deselected.  
See the Truth Table in this datasheet for a complete  
description of read and write modes.  
The CY7C199C is available in 28 DIP, 28 SOJ, and 28 TSOP  
I package(s).  
• Low CMOS standby power  
• Automated Power–down when deselected  
Logic Block Diagram  
Input Buffer  
RAM Array  
I/Ox  
CE  
WE  
OE  
Power  
Down  
Circuit  
Column Decoder  
A X  
X
Product Portfolio  
12 ns  
15 ns  
20 ns  
20  
25 ns  
25  
Unit  
ns  
Maximum Access Time  
12  
85  
15  
80  
Maximum Operating Current  
75  
75  
mA  
uA  
Maximum CMOS Standby Current  
(low power)  
500  
500  
500  
500  
Notes:  
1. For best–practices recommendations, please refer to the Cypress application note System Design Guidelines on www.cypress.com.  
Cypress Semiconductor Corporation  
Document #: 38-05408 Rev. *A  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Revised September 11, 2003  

CY7C199C-15VXC 替代型号

型号 品牌 替代类型 描述 数据表
CY7C199-15VC CYPRESS

完全替代

32K x 8 Static RAM
CY7C199CNL-15VXI CYPRESS

类似代替

256K (32K x 8) Static RAM
IDT71256SA15Y IDT

类似代替

CMOS STATIC RAM 256K (32K x 8-BIT)

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Standard SRAM, 32KX8, 20ns, CMOS, PDSO28, 8 X 13.40 MM, LEAD FREE, TSOP1-28