96
CY7C194
CY7C195
CY7C196
64K x 4 Static RAM
able(s) (CE on the CY7C194 and CY7C195, CE1, CE2 on the
CY7C196) and three-state drivers. They have an automatic
power-down feature, reducing the power consumption by 75%
when deselected.
Features
• High speed
— 12 ns
Writing to the device is accomplished when the Chip Enable(s)
(CE on the CY7C194 and CY7C195, CE1, CE2 on the
CY7C196) and Write Enable (WE) inputs are both LOW. Data
on the four input pins (I/O0 through I/O3) is written into the
memory location, specified on the address pins (A0 through
A15).
• Output enable (OE) feature (7C195 and 7C196)
• CMOS for optimum speed/power
• Low active power
— 880 mW
• Low standby power
Reading the device is accomplished by taking the Chip En-
able(s) (CE on the CY7C194 and CY7C195, CE1, CE2 on the
CY7C196) LOW, while Write Enable (WE) remains HIGH. Un-
der these conditions the contents of the memory location
specified on the address pins will appear on the four data I/O
pins.
— 220 mW
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
Functional Description
The CY7C194, CY7C195, and CY7C196 are high-perfor-
mance CMOS static RAMs organized as 65,536 by 4 bits.
Easy memory expansion is provided by active LOW Chip En-
A die coat is used to ensure alpha immunity.
Logic Block Diagram
Pin Configurations
DIP/SOJ
Top View
DIP/SOJ
Top View
V
28
27
26
1
2
3
4
5
6
V
NC
A
6
A
CC
1
24
CC
6
A
5
A
A
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
5
7
A
7
A
8
A
8
A
4
A
3
A
4
25
24
A
A
3
9
A
A
10
A
11
A
12
A
13
9
A
A
2
2
A
10
A
11
23
22
7C194
A
1
A
1
7C195
7C196
A
A
7
8
9
10
11
12
13
0
0
CE
A
12
A
13
2
21
20
19
18
17
NC
I/O
I/O
3
(7C196)
INPUT BUFFER
A
A
16
15
2
14
NC
A
A
I/O
I/O
I/O
15
14
3
1
(7C195)
A
1
I/O
I/O
I/O
15
2
1
0
CE
14
13
0
A
CE
2
12
1
GND
WE
I/O
I/O
3
A
OE
16
15
3
A
4
GND
WE
14
2
A
5
C194-2
1024 x 64 x 4
ARRAY
A
C194-3
6
A
7
A
I/O
I/O
1
8
A
9
0
A
10
POWER
DOWN
COLUMN
DECODER
CE (7C196 only)
1
2
CE
WE
(OE)
(7C195 and
7C196 ONLY)
C194-1
Selection Guide
7C194-12
7C195-12
7C196-12
7C194-15
7C195-15
7C196-15
7C194-20
7C195-20
7C196-20
7C194-25
7C195-25
7C196-25
7C194-35
7C195-35
7C196-35
7C194-45
7C196-45
Maximum Access Time (ns)
12
155
30
15
145
30
20
135
30
25
115
30
35
115
30
45
Maximum Operating Current (mA)
Maximum Standby Current (mA)
30
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Document #: 38-05162 Rev. **
Revised September 18, 2001
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