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CY7C135-15JCT PDF预览

CY7C135-15JCT

更新时间： 2024-11-27 06:58:43
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器内存集成电路
页数 文件大小 规格书
12页 401K
描述
Dual-Port SRAM, 4KX8, 15ns, CMOS, PQCC52, PLASTIC, LCC-52

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中文翻译

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CY7C135-15JCT 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：LCC包装说明：QCCJ,
针数：52Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.41
风险等级：5.88最长访问时间：15 ns
JESD-30 代码：S-PQCC-J52JESD-609代码：e0
长度：19.1262 mm内存密度：32768 bit
内存集成电路类型：DUAL-PORT SRAM内存宽度：8
湿度敏感等级：1功能数量：1
端口数量：2端子数量：52
字数：4096 words字数代码：4000
工作模式：ASYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：4KX8
输出特性：3-STATE可输出：YES
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装形状：SQUARE封装形式：CHIP CARRIER
并行/串行：PARALLEL峰值回流温度（摄氏度）：220
认证状态：Not Qualified座面最大高度：5.08 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：TIN LEAD端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：19.1262 mm

CY7C135-15JCT 数据手册

 浏览型号CY7C135-15JCT的Datasheet PDF文件第2页浏览型号CY7C135-15JCT的Datasheet PDF文件第3页浏览型号CY7C135-15JCT的Datasheet PDF文件第4页浏览型号CY7C135-15JCT的Datasheet PDF文件第5页浏览型号CY7C135-15JCT的Datasheet PDF文件第6页浏览型号CY7C135-15JCT的Datasheet PDF文件第7页 
CY7C135, CY7C135A  
CY7C1342  
4K x 8 Dual-Port Static RAM and 4K x 8  
Dual-Port SRAM with Semaphores  
Features  
Functional Description  
■
True dual-ported memory cells, which allow simultaneous  
reads of the same memory location  
The CY7C135/135A[1] and CY7C1342 are high speed CMOS 4K  
x 8 dual-port static RAMs. The CY7C1342 includes semaphores  
that provide a means to allocate portions of the dual-port RAM  
or any shared resource. Two ports are provided permitting  
independent, asynchronous access for reads and writes to any  
location in memory. Application areas include interpro-  
■
■
■
■
■
■
■
4K x 8 organization  
0.65 micron CMOS for optimum speed and power  
High speed access: 15 ns  
cessor/multiprocessor  
designs,  
communications  
status  
buffering, and dual-port video/graphics memory.  
Low operating power: ICC = 160 mA (max)  
Fully asynchronous operation  
Automatic power down  
Each port has independent control pins: chip enable (CE), read  
or write enable (R/W), and output enable (OE). The  
CY7C135/135A is suited for those systems that do not require  
on-chip arbitration or are intolerant of wait states. Therefore, the  
user must be aware that simultaneous access to a location is  
possible. Semaphores are offered on the CY7C1342 to assist in  
arbitrating between ports. The semaphore logic is comprised of  
eight shared latches. Only one side can control the latch  
(semaphore) at any time. Control of a semaphore indicates that  
a shared resource is in use. An automatic power down feature is  
controlled independently on each port by a chip enable (CE) pin  
or SEM pin (CY7C1342 only).  
Semaphores included on the 7C1342 to permit software  
handshaking between ports  
■
■
Available in 52-pin PLCC  
Pb-free packages available  
The CY7C135/135A and CY7C1342 are available in 52-pin  
PLCC.  
Logic Block Diagram  
R/WL  
R/WR  
CEL  
OEL  
CER  
OER  
I/O7L  
I/O7R  
I/O0R  
I/O  
CONTROL  
I/O  
CONTROL  
I/O0L  
A11L  
A11R  
ADDRESS  
DECODER  
ADDRESS  
DECODER  
MEMORY  
ARRAY  
A0L  
A0R  
SEMAPHORE  
ARBITRATION  
(7C1342 only)  
CEL  
OEL  
CER  
OER  
R/WL  
R/WR  
(7C1342 only)  
(7C1342 only)  
SEMR  
SEML  
Note  
1. CY7C135 and CY7C135A are functionally identical  
Cypress Semiconductor Corporation  
Document #: 38-06038 Rev. *D  
•
198 Champion Court  
•
San Jose  
,
CA 95134-1709  
•
408-943-2600  
Revised December 09, 2008  
[+] Feedback  
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与CY7C135-15JCT相关器件

型号 品牌 获取价格 描述 数据表
CY7C135-15JXC CYPRESS

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 		4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores
CY7C1351-66AC CYPRESS

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 		128Kx36 Flow-Through SRAM with NoBL TM Architecture
CY7C1351-66ACT CYPRESS

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 		ZBT SRAM, 128KX36, 11ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
CY7C1351B ETC

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 		Memory
CY7C1351B-100AC CYPRESS

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 		ZBT SRAM, 128KX36, 8.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
CY7C1351B-100BGC CYPRESS

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 		ZBT SRAM, 128KX36, 8.5ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, PLASTIC, BGA-119
CY7C1351B-100BGCT CYPRESS

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 		ZBT SRAM, 128KX36, 8.5ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, FBGA-119
CY7C1351B-117AC CYPRESS

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 		ZBT SRAM, 128KX36, 7.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
CY7C1351B-117ACT CYPRESS

获取价格

 		ZBT SRAM, 128KX36, 7.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
CY7C1351B-117BGC CYPRESS

获取价格

 		ZBT SRAM, 128KX36, 7.5ns, CMOS, PBGA119, 14 X 22 MM, 2.40 MM HEIGHT, PLASTIC, BGA-119

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