Datasheet > CY7C1049DV33_07

CY7C1049DV33_07

更新时间： 2024-11-07 05:19:03

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
10页	863K
描述
4-Mbit (512K x 8) Static RAM

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中文翻译

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数据手册

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CY7C1049DV33_07 数据手册

CY7C1049DV33

4-Mbit (512K x 8) Static RAM

Features

Functional Description

■ Pin and function compatible with CY7C1049CV33

The CY7C1049DV33 is a high performance CMOS Static RAM

organized as 512K words by 8-bits. Easy memory expansion is

provided by an Active LOW Chip Enable (CE), an Active LOW

Output Enable (OE), and tri-state drivers. You can write to the

device by taking Chip Enable (CE) and Write Enable (WE) inputs

LOW. Data on the eight IO pins (IO₀through IO₇) is then written

into the location specified on the address pins (A₀through A₁₈).

■ High speed

❐ t_AA= 10 ns

■ Low active power

❐ I_CC= 90 mA @ 10 ns (Industrial)

■ Low CMOS standby power

❐ I_SB2= 10 mA

You can read from the device by taking Chip Enable (CE) and

Output Enable (OE) LOW while forcing Write Enable (WE) HIGH.

Under these conditions, the contents of the memory location

specified by the address pins appear on the IO pins.

■ 2.0V data retention

■ Automatic power down when deselected

■ TTL compatible inputs and outputs

■ Easy memory expansion with CE and OE features

The eight input or output pins (IO₀through IO₇) are placed in a

high impedance state when the device is deselected (CE HIGH),

the outputs are disabled (OE HIGH), or during a write operation

(CE LOW, and WE LOW).

■ Available in Pb-free 36-pin (400 Mil) Molded SOJ and 44-pin

TSOP II packages

The CY7C1049DV33 is available in standard 400 Mil wide 36

-pin SOJ package and 44-pin TSOP II package with center

power and ground (revolutionary) pinout.

Refer to the Cypress application note AN1064, SRAM System

Guidelines for best practice recommendations.

Logic Block Diagram

INPUT BUFFER

512K x 8

ARRAY

POWER

DOWN

COLUMN DECODER

Cypress Semiconductor Corporation

Document Number: 38-05475 Rev. *D

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised July 23, 2007

12 3 4 5 6 7...10

中文翻译

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与CY7C1049DV33_07相关器件

型号	品牌	获取价格	描述	数据表
CY7C1049DV33_11	CYPRESS	获取价格	4-Mbit (512 K x 8) Static RAM Automatic power down when deselected
CY7C1049DV33-10VXI	CYPRESS	获取价格	4-Mbit (512K x 8) Static RAM
CY7C1049DV33-10VXI	ROCHESTER	获取价格	512KX8 STANDARD SRAM, 10ns, PDSO36, 0.400 INCH, LEAD FREE, SOJ-36
CY7C1049DV33-10VXIT	CYPRESS	获取价格	Standard SRAM, 512KX8, 10ns, CMOS, PDSO36, 0.400 INCH, LEAD FREE, PLASTIC, SOJ-36
CY7C1049DV33-10ZSXC	CYPRESS	获取价格	Standard SRAM, 512KX8, 10ns, CMOS, PDSO44, LEAD FREE, TSOP2-44
CY7C1049DV33-10ZSXI	ROCHESTER	获取价格	512KX8 STANDARD SRAM, 10ns, PDSO44, LEAD FREE, TSOP2-44
CY7C1049DV33-10ZSXI	CYPRESS	获取价格	4-Mbit (512K x 8) Static RAM
CY7C1049DV33-10ZSXIT	CYPRESS	获取价格	Standard SRAM, 512KX8, 10ns, CMOS, PDSO44, LEAD FREE, TSOP2-44
CY7C1049DV33-12VXC	CYPRESS	获取价格	Standard SRAM, 512KX8, 12ns, CMOS, PDSO36, 0.400 INCH, LEAD FREE, SOJ-36
CY7C1049DV33-12VXE	CYPRESS	获取价格	4-Mbit (512K x 8) Static RAM

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