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CY7C0430CV-133BGI PDF预览

CY7C0430CV-133BGI

更新时间: 2024-09-18 04:10:15
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
37页 940K
描述
10 Gb/s 3.3V QuadPort⑩ DSE Family

CY7C0430CV-133BGI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:27 X 27 MM, 2.33 MM HEIGHT, 1.27 MM PITCH, PLASTIC, BGA-272针数:272
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.8
最长访问时间:4.2 ns其他特性:PIPELINED ARCHITECTURE
I/O 类型:COMMONJESD-30 代码:S-PBGA-B272
JESD-609代码:e0长度:27 mm
内存密度:1179648 bit内存集成电路类型:FOUR-PORT SRAM
内存宽度:18湿度敏感等级:3
功能数量:1端口数量:4
端子数量:272字数:65536 words
字数代码:64000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:64KX18输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA272,20X20,50封装形状:SQUARE
封装形式:GRID ARRAY并行/串行:PARALLEL
峰值回流温度(摄氏度):220电源:3.3 V
认证状态:Not Qualified座面最大高度:2.46 mm
最大待机电流:0.015 A最小待机电流:3.15 V
子类别:SRAMs最大压摆率:0.7 mA
最大供电电压 (Vsup):3.45 V最小供电电压 (Vsup):3.15 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:BALL
端子节距:1.27 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:27 mm
Base Number Matches:1

CY7C0430CV-133BGI 数据手册

 浏览型号CY7C0430CV-133BGI的Datasheet PDF文件第2页浏览型号CY7C0430CV-133BGI的Datasheet PDF文件第3页浏览型号CY7C0430CV-133BGI的Datasheet PDF文件第4页浏览型号CY7C0430CV-133BGI的Datasheet PDF文件第5页浏览型号CY7C0430CV-133BGI的Datasheet PDF文件第6页浏览型号CY7C0430CV-133BGI的Datasheet PDF文件第7页 
CY7C0430BV  
CY7C0430CV  
10 Gb/s 3.3V QuadPort™ DSE Family  
• DualChip Enables on all ports for easydepth expansion  
• Separate upper-byte and lower-byte controls on all  
Features  
• QuadPort™ datapath switching element (DSE) family  
allows four independent ports of access for data path  
management and switching  
ports  
• Simple array partitioning  
— Internal mask register controls counter wrap-around  
— Counter-Interrupt flags to indicate wrap-around  
— Counter and mask registers readback on address  
• High-bandwidth data throughput up to 10 Gb/s  
• 133-MHz[1] port speed x 18-bit-wide interface × 4 ports  
• High-speed clock to data access 4.2 ns (max.)  
• Synchronous pipelined device  
— 1-Mb (64K × 18) switch array  
• 0.25-micron CMOS for optimum speed/power  
• IEEE 1149.1 JTAG boundary scan  
• 272-ball BGA package (27-mm × 27-mm × 1.27-mm ball  
pitch)  
• Commercial and industrial temperature ranges  
• 3.3V low operating power  
— Active = 750 mA (maximum)  
• Width and depth expansion capabilities  
• BIST (Built-In Self-Test) controller  
— Standby = 15 mA (maximum  
QuadPort DSE Family Applications  
PORT 1  
PORT 3  
PORT 4  
PORT 2  
BUFFERED SWITCH  
PORT 2  
PORT 3  
PORT 4  
PORT 1  
REDUNDANT DATA MIRROR  
Note:  
1. f  
for commercial is 135 MHz and for industrial is 133 MHz.  
MAX2  
Cypress Semiconductor Corporation  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Document #: 38-06027 Rev. *B  
Revised May 23, 2006  

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