Datasheet > CY7C024E-15AXCT

CY7C024E-15AXCT

更新时间： 2024-09-18 15:30:15

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器内存集成电路
页数	文件大小	规格书
24页	251K
描述
Multi-Port SRAM, 4KX16, 15ns, CMOS, PQFP100, ROHS COMPLIANT, PLASTIC, MS-026, TQFP-100

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技术参数
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CY7C024E-15AXCT 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	包装说明：	ROHS COMPLIANT, PLASTIC, MS-026, TQFP-100
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.41	风险等级：	5.84
最长访问时间：	15 ns	I/O 类型：	COMMON
JESD-30 代码：	S-PQFP-G100	JESD-609代码：	e4
长度：	14 mm	内存密度：	65536 bit
内存集成电路类型：	MULTI-PORT SRAM	内存宽度：	16
湿度敏感等级：	3	功能数量：	1
端口数量：	2	端子数量：	100
字数：	4096 words	字数代码：	4000
工作模式：	ASYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	4KX16
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装等效代码：	QFP100,.63SQ,20
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
并行/串行：	PARALLEL	峰值回流温度（摄氏度）：	260
电源：	5 V	认证状态：	Not Qualified
座面最大高度：	1.6 mm	最大待机电流：	0.0015 A
最小待机电流：	2 V	子类别：	SRAMs
最大压摆率：	0.285 mA	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	14 mm	Base Number Matches：	1

CY7C024E-15AXCT 数据手册

CY7C024E

CY7C025E

CY7C0251E

4K × 16 and 8K × 16/18

Dual-Port Static RAM with SEM, INT, BUSY

× 16 and 8K × 16/18 Dual-Port Static RAM with SEM, INT, BUSY

Features

Functional Description

■ True dual-ported memory cells that allow simultaneous reads

of the same memory location

The CY7C024E and CY7C025E/CY7C0251E are low-power

CMOS 4K × 16 and 8K × 16/18 dual-port static RAMs. Various

arbitration schemes are included on the CY7C024E and

CY7C025E/CY7C0251E to handle situations when multiple

processors access the same piece of data. Two ports are

provided, permitting independent, asynchronous access for

reads and writes to any location in memory. The CY7C024E and

CY7C025E/CY7C0251E can be used as standalone 16 or 18-bit

dual-port static RAMs or multiple devices can be combined to

function as a 32-/36-bit or wider master/ slave dual-port static

RAM. An M/S pin is provided for implementing 32-/36-bit or wider

memory applications without the need for separate master and

slave devices or additional discrete logic. Application areas

include interprocessor/multiprocessor designs, communications

status buffering, and dual-port video/graphics memory.

■ 4K × 16 organization (CY7C024E)

■ 8K × 16 organization (CY7C025E)

■ 8K × 18 organization (CY7C0251E)

■ 0.35-µ complementary metal oxide semiconductor (CMOS) for

optimum speed and power

■ High-speed access: 15 ns

■ Low operating power: I_CC= 180 mA (typ), I_SB3= 0.05 mA (typ)

■ Fully asynchronous operation

■ Automatic power-down

Each port has independent control pins: Chip Enable (CE), Read

or Write Enable (R/W), and Output Enable (OE). Two flags are

provided on each port (BUSY and INT). BUSY signals that the

port is trying to access the same location currently being

accessed by the other port. The Interrupt Flag (INT) permits

communication between ports or systems by means of a mail

box. The semaphores are used to pass a flag, or token, from one

port to the other to indicate that a shared resource is in use. The

semaphore logic is comprised of eight shared latches. Only one

side can control the latch (semaphore) at any time. Control of a

semaphore indicates that a shared resource is in use. An

automatic power-down feature is controlled independently on

each port by a CE pin.

■ Expandable data bus to 32/36 bits or more using master/slave

chip select when using more than one device

■ On-chip arbitration logic

■ Semaphores included to permit software handshaking

between ports

■ INT flag for port-to-port communication

■ Separate upper-byte and lower-byte control

■ Pin select for master or slave

■ Available in Pb-free 100-pin thin quad flatpack (TQFP) package

The CY7C024E and CY7C025E/CY7C0251E are available in

100-pin Pb-free TQFP.

For a complete list of related documentation, click here.

Selection Guide

Parameter

Maximum access time (ns)

-15

-25

-55

Typical operating current (mA)

Typical standby current for I_SB1(mA)

190

170

150

Cypress Semiconductor Corporation

Document Number: 001-62932 Rev. *H

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised August 17, 2017

12 3 4 5 6 7...24

中文翻译

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与CY7C024E-15AXCT相关器件

型号	品牌	获取价格	描述	数据表
CY7C024E-25AXC	CYPRESS	获取价格	4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
CY7C024E-25AXCT	CYPRESS	获取价格	Multi-Port SRAM, 4KX16, 25ns, CMOS, PQFP100, ROHS COMPLIANT, PLASTIC, MS-026, TQFP-100
CY7C024E-25AXI	CYPRESS	获取价格	4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
CY7C024E-55AXC	CYPRESS	获取价格	4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
CY7C024V	CYPRESS	获取价格	3.3V 4K/8K/16K x 16/18 Dual-Port Static RAM
CY7C024V-15AC	CYPRESS	获取价格	Dual-Port SRAM, 4KX16, 15ns, CMOS, PQFP100, PLASTIC, TQFP-100
CY7C024V-20AC	CYPRESS	获取价格	Dual-Port SRAM, 4KX16, 20ns, CMOS, PQFP100, PLASTIC, TQFP-100
CY7C024V-20AI	CYPRESS	获取价格	Dual-Port SRAM, 4KX16, 20ns, CMOS, PQFP100, PLASTIC, TQFP-100
CY7C024V-25ACT	CYPRESS	获取价格	Dual-Port SRAM, 4KX16, 25ns, CMOS, PQFP100, PLASTIC, TQFP-100
CY7C025	CYPRESS	获取价格	4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY

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