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CY74FCT821BTPC PDF预览

CY74FCT821BTPC

更新时间: 2024-11-21 09:43:03
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
10页 88K
描述
8-/9-/10-Bit Bus Interface Registers

CY74FCT821BTPC 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP24,.3针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.14系列:FCT
JESD-30 代码:R-PDIP-T24JESD-609代码:e4
长度:31.64 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:83300000 Hz
最大I(ol):0.064 A位数:10
功能数量:1端口数量:2
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:7.5 ns
传播延迟(tpd):15 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Bus Driver/Transceiver
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.62 mmBase Number Matches:1

CY74FCT821BTPC 数据手册

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Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY74FCT821T  
CY74FCT823T  
CY74FCT825T  
SCCS033 - May 1994 - Revised March 2000  
8-/9-/10-Bit Bus Interface Registers  
Features  
Functional Description  
• Function, pinout, and drive compatible with FCT, F, and  
Am29821/23/25 logic  
• FCT-C speed at 6.0 ns max.  
FCT-B speed at 7.5 ns max.  
• Reduced VOH (typically = 3.3V) versions of equivalent  
FCT functions  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
These bus interface registers are designed to eliminate the  
extra packages required to buffer existing registers and  
provide extra data width for wider address/data paths or buses  
carrying parity. The FCT821T is a buffered, 10-bit wide version  
of the popular FCT374 function. The FCT823T is a 9-bit wide  
buffered register with clock enable (EN) and clear (CLR) ideal  
for parity bus interfacing in high-performance micropro-  
grammed systems. The FCT825T is an 8-bit buffered register  
with all the FCT823T controls plus multiple enables (OE1,  
OE2, OE3) to allow multiuser control of the interface, e.g., CS,  
DMA, and RD/WR. They are ideal for use as an output port  
• Power-off disable feature  
• Matched rise and fall times  
• Fully compatible with TTL input and output logic levels  
• ESD > 2000V  
requiring high IOL/IOH  
.
These devices are designed for high-capacitance load drive  
capability, while providing low-capacitance bus loading at both  
inputs and outputs. Outputs are designed for low-capacitance  
bus loading in the high-impedance state and are designed with  
a power-off disable feature to allow for live insertion of boards.  
• Sink current  
Source current  
64 mA  
32 mA  
• High-speed parallel registers with positive  
edge-triggered D-type flip-flops  
• Bufferedcommonclockenable(EN)andasynchronous  
clear input (CLR)  
• Extended commercial range of 40˚C to +85˚C  
Logic Block Diagram  
D
0
D
D
4
D
5
D
D
3
D
N- 1  
D
N
1
2
[1]  
EN  
[1]  
CLR  
CL  
CL  
CL  
CL  
CL  
CL  
CL  
CL  
D
Q
Q
D
Q
Q
D
Q
Q
D
Q
D
Q
Q
D
Q
Q
D
Q
Q
D
Q
Q
CP  
CP  
CP  
CP  
CP  
CP  
CP  
CP  
Q
CP  
OE  
Y
0
Y
1
Y
4
Y
5
Y
2
Y
3
Y
n-  
Y
n
1
Note:  
1. Not on FCT821.  
Copyright © 2000, Texas Instruments Incorporated  

CY74FCT821BTPC 替代型号

型号 品牌 替代类型 描述 数据表
CY74FCT821BTSOCTG4 TI

完全替代

10-Bit Bus Interface Flip-Flops with 3-State Outputs 24-SOIC -40 to 85
CY74FCT821BTSOCT TI

完全替代

8-/9-/10-Bit Bus Interface Registers

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