5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> CY74FCT543TSOC
CY74FCT543TSOC PDF预览

CY74FCT543TSOC

更新时间： 2024-02-23 23:57:41
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
9页 76K
描述
8-Bit Latched Registered Transceiver

阅读下载

中文翻译

获取价格

CY74FCT543TSOC 技术参数

是否Rohs认证： 不符合生命周期：Transferred
零件包装代码：SOIC包装说明：0.300 INCH, PLASTIC, SOIC-24
针数：24Reach Compliance Code：not_compliant
风险等级：5.06其他特性：WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型：INDEPENDENT CONTROL计数方向：BIDIRECTIONAL
系列：FCTJESD-30 代码：R-PDSO-G24
JESD-609代码：e0长度：15.4 mm
负载电容（CL）：50 pF逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
最大I（ol）：0.064 A位数：8
功能数量：1端口数量：2
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP24,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL电源：5 V
Prop。Delay @ Nom-Sup：8.5 ns传播延迟（tpd）：12.5 ns
认证状态：Not Qualified座面最大高度：2.65 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL翻译：N/A
宽度：7.5 mmBase Number Matches：1

CY74FCT543TSOC 数据手册

 浏览型号CY74FCT543TSOC的Datasheet PDF文件第2页浏览型号CY74FCT543TSOC的Datasheet PDF文件第3页浏览型号CY74FCT543TSOC的Datasheet PDF文件第4页浏览型号CY74FCT543TSOC的Datasheet PDF文件第5页浏览型号CY74FCT543TSOC的Datasheet PDF文件第6页浏览型号CY74FCT543TSOC的Datasheet PDF文件第7页 
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY54/74FCT543T  
SCCS030 - May 1994 - Revised March 2000  
8-Bit Latched Registered Transceiver  
Features  
Functional Description  
• Function, pinout, and drive compatible with FCT and  
The FCT543T octal latched transceiver contains two sets of  
eight D-type latches with separate latch enable (LEAB, LEBA)  
and output enable (OEAB, OEBA) controls for each set to  
permit independent control of inputting and outputting in either  
direction of data flow. For data flow from A to B, for example,  
the A-to-B enable (CEAB) input must be LOW in order to enter  
data from A or to take data from B, as indicated in the truth  
table. With CEAB LOW, a LOW signal on the A-to-B latch  
enable (LEAB) input makes the A-to-B latches transparent; a  
subsequent LOW-to-HIGH transition of the LEAB signal puts  
the A latches in the storage mode and their output no longer  
change with the A inputs. With CEAB and OEAB both LOW,  
the three-stage B output buffers are active and reflect the data  
present at the output of the A latches. Control of data from B  
to A is similar, but uses CEAB, LEAB, and OEAB inputs.  
F logic  
• FCT-C speed at 5.3 ns max. (Com’l)  
FCT-A speed at 6.5 ns max. (Com’l)  
• Reduced VOH (typically = 3.3V) versions of equivalent  
FCT functions  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
• Power-off disable feature  
• Matched rise and fall times  
• Fully compatible with TTL input and output logic levels  
• ESD > 2000V  
• Sink current  
Source current  
64 mA (Com’l), 48 mA (Mil)  
32 mA (Com’l), 12 mA (Mil)  
• Separation controls for data flow in each direction  
• Back to back latches for storage  
The outputs are designed with a power-off disable feature to  
allow for live insertion of boards.  
• Extended commercial range of −40˚C to +85˚C  
Functional Block Diagram  
Logic Block Diagram  
DetailA  
B
D Q  
LE  
0
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
CEAB  
OEAB  
A
0
Q D  
LE  
CEBA  
LEAB  
LEBA  
OEBA  
A
B
B
B
B
B
B
B
1
1
2
3
4
5
6
7
B
B
B
B
B
B
B
B
7
0
1
2
3
4
5
6
A
2
A
3
A
4
DetailA x 7  
A
5
A
6
Pin Configurations  
A
7
SOIC/QSOP  
Top View  
OEBA  
OEAB  
1
LEBA  
OEBA  
24  
23  
22  
21  
CEBA  
LEBA  
V
CC  
2
CEBA  
CEAB  
LEAB  
3
A
0
B
0
4
A
1
B
1
A
2
5
B
2
20  
19  
18  
17  
16  
A
3
6
B
3
A
4
B
4
7
A
5
B
5
8
A
6
B
6
9
A
7
B
7
10  
11  
12  
15  
14  
13  
CEAB  
GND  
LEAB  
OEAB  
Copyright © 2000, Texas Instruments Incorporated  
1234567...9

中文翻译

下载PDF

CY74FCT543TSOC 替代型号

型号 品牌 替代类型 描述 数据表
CY74FCT543TSOCTE4 TI

完全替代

 8-BIT LATCHED REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
CY74FCT543TSOCT TI

完全替代

 8-Bit Latched Registered Transceiver
CY74FCT543TSOCE4 TI

完全替代

 8-BIT LATCHED REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

与CY74FCT543TSOC相关器件

型号 品牌 获取价格 描述 数据表
CY74FCT543TSOCE4 TI

获取价格

 		8-BIT LATCHED REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
CY74FCT543TSOCG4 TI

获取价格

 		8-BIT LATCHED REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
CY74FCT543TSOCR TI

获取价格

 		暂无描述
CY74FCT543TSOCT TI

获取价格

 		8-Bit Latched Registered Transceiver
CY74FCT543TSOCT CYPRESS

获取价格

 		Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.300 IN
CY74FCT543TSOCTE4 TI

获取价格

 		8-BIT LATCHED REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
CY74FCT543TSOCTG4 TI

获取价格

 		8-BIT LATCHED REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
CY74FCT543TSOIC TI

获取价格

 		8-Bit Latched Registered Transceiver
CY74FCT573ATPC TI

获取价格

 		8-Bit Latches
CY74FCT573ATPC CYPRESS

获取价格

 		Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP

与CY74FCT543TSOC相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证