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CY74FCT480TDIP

更新时间： 2024-11-25 05:18:59
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
8页 84K
描述
Dual 8-Bit Parity Generator/Checker

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中文翻译

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CY74FCT480TDIP 数据手册

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1CY54/74FCT480T  
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY54/74FCT480T  
Dual 8-Bit Parity Generator/Checker  
SCCS025 - May 1993 - Revised March 2000  
• Two 8-bit parity generator/checkers  
Features  
• Open drain Active LOW parity error output  
• Function, pinout and drive compatible with FCT and F  
• Expandable for larger word widths  
logic  
• FCT-A speed at 7.5 ns max. (Com’l)  
FCT-B speed at 5.6 ns max. (Com’l)  
Functional Description  
The FCT480T is  
a
high-speed dual 8-bit parity  
• Reduced VOH (typically = 3.3V) versions of equivalent  
FCT functions  
generator/checker. Each parity generator/checker accepts  
eight data bits and one parity bit as inputs, and generates a  
sum and parity error output. The FCT480T can be used in  
ODD parity systems. The parity error output is open-drain,  
designed for easy expansion of the word width by a wired-OR  
connection of several FCT480T type devices. Since additional  
logic is not needed, the parity generation or checking times  
remain the same as for an individual FCT480T device.  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
• Power-off disable feature  
• Matched rise and fall times  
• ESD > 2000V  
• Fully compatible with TTL input and output logic levels  
• Sink Current  
64 mA (Com’l),  
32 mA (Mil)  
The outputs are designed with a power-off disable feature to  
allow for live insertion of boards.  
Source Current 32 mA (Com’l),  
12 mA (Mil)  
LogicBlockDiagram  
A
1
B
1
C
1
1
D
ODD  
1
E
1
F
1
G
1
H
1
PAR  
1
ERR  
CHK/GEN  
A
2
B
2
C
2
D
2
ODD  
2
E
2
F
2
G
2
H
2
PAR  
2
FCT480T–1  
Pin Configurations  
DIP/SOIC/QSOP  
Top View  
LCC  
Top View  
1
2
3
4
5
6
24  
23  
22  
21  
V
A
CC  
1
B
C
1
A
2
B
2
1
D
1
C
2
9
8 7 6 5  
1110  
12  
13  
14  
15  
16  
17  
20  
19  
E
1
CHK/GEN  
C
D
1
2
4
ODD  
1
B
A
1
F
1
E
2
3
2
1
28  
27  
26  
GND  
NC  
ODD  
2
ERROR  
PAR  
2
1
G
1
7
18  
17  
16  
F
2
NC  
H
1
8
G
2
V
CC  
A
2
PAR  
9
H
2
1
B
2
CHK/GEN  
10  
11  
12  
PAR  
2
18  
15  
14  
13  
1920 2122 23 24 25  
ODD  
1
ERROR  
ODD  
GND  
2
FCT480T–2  
FCT480T–3  
Copyright © 2000, Texas Instruments Incorporated  
12345678

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