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CY74FCT399ATQCTE4 PDF预览

CY74FCT399ATQCTE4

更新时间: 2024-11-24 21:53:27
品牌 Logo 应用领域
德州仪器 - TI 触发器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 261K
描述
Quad 2-Input Register

CY74FCT399ATQCTE4 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SSOP, SSOP16,.25
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.68
Is Samacsys:N其他特性:FOUR 2:1 MUX FOLLOWED BY REGISTER
系列:FCTJESD-30 代码:R-PDSO-G16
长度:4.9 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大I(ol):0.064 A
位数:4功能数量:1
输入次数:2端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:7 ns
传播延迟(tpd):7 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Multiplexer/Demultiplexers
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:3.9 mm
Base Number Matches:1

CY74FCT399ATQCTE4 数据手册

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CY74FCT399T  
QUAD 2-INPUT REGISTER  
SCCS024A – MARCH 1994 – REVISED OCTOBER 2001  
SO PACKAGE  
(TOP VIEW)  
Function, Pinout, and Drive Compatible  
With FCT and F Logic  
Reduced V  
Equivalent FCT Functions  
(Typically = 3.3 V) Versions of  
OH  
S
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Q
Q
I
A
0A  
1A  
1B  
0B  
D
Edge-Rate Control Circuitry for  
Significantly Improved Noise  
Characteristics  
I
I
I
I
0D  
1D  
1C  
0C  
I
I
I
I
Supports Partial-Power-Down Mode  
off  
Operation  
Q
Q
C
CP  
B
GND  
Matched Rise and Fall Times  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
Fully Compatible With TTL Input and  
Output Logic Levels  
64-mA Output Sink Current  
32-mA Output Source Current  
description  
The CY74FCT399T is a high-speed quad 2-input register that selects four bits of data from either of two sources  
(ports) under control of a common select (S) input. Selected data are transferred to a 4-bit output register  
synchronous with the low-to-high transition of the clock (CP) input. The 4-bit D-type output register is fully edge  
triggered. The data inputs (I , I ) and S input must be stable only one setup time prior to, and hold time after,  
0X 1X  
the low-to-high transition of CP for predictable operation. The CY74FCT399T has noninverted outputs.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
PIN DESCRIPTION  
NAME  
S
DESCRIPTION  
Common select input  
CP  
Clock-pulse input (active rising edge)  
Data inputs from source 0  
I
I
0
Data inputs from source 1  
1
Q
Register noninverted outputs  
ORDERING INFORMATION  
SPEED  
(ns)  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
Tube  
6.1  
6.1  
7
CY74FCT399CTSOC  
CY74FCT399CTSOCT  
CY74FCT399ATSOC  
CY74FCT399ATSOCT  
SOIC – SO  
SOIC – SO  
FCT399C  
FCT399A  
Tape and reel  
Tube  
–40°C to 85°C  
Tape and reel  
7
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

CY74FCT399ATQCTE4 替代型号

型号 品牌 替代类型 描述 数据表
CY74FCT399ATSOCTG4 TI

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Quad 2-Input Register

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