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CY74FCT2646ATQCT

更新时间： 2024-01-17 04:03:34
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 53K
描述
8-Bit Registered Transceiver

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中文翻译

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CY74FCT2646ATQCT 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：24
Reach Compliance Code：unknown风险等级：5.6
其他特性：DIRECTION CONTROL; SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED OR REAL TIME DATA系列：FCT
JESD-30 代码：R-PDSO-G24长度：15.4 mm
负载电容（CL）：50 pF逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
位数：8功能数量：1
端口数量：2端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE WITH SERIES RESISTOR输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
传播延迟（tpd）：9 ns认证状态：Not Qualified
座面最大高度：2.65 mm最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
宽度：7.5 mmBase Number Matches：1

CY74FCT2646ATQCT 数据手册

 浏览型号CY74FCT2646ATQCT的Datasheet PDF文件第2页浏览型号CY74FCT2646ATQCT的Datasheet PDF文件第3页浏览型号CY74FCT2646ATQCT的Datasheet PDF文件第4页浏览型号CY74FCT2646ATQCT的Datasheet PDF文件第5页浏览型号CY74FCT2646ATQCT的Datasheet PDF文件第6页浏览型号CY74FCT2646ATQCT的Datasheet PDF文件第7页 
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY74FCT2646T  
SCCS043 - September 1994 - Revised March 2000  
8-Bit Registered Transceiver  
Features  
Functional Description  
• Function and pinout compatible with FCT and F logic  
• FCT-C speed at 5.4 ns max.  
FCT-A speed at 6.3 ns max.  
• Reduced VOH (typically = 3.3V) versions of equivalent  
FCT functions  
• 25Ω output series resistors to reduce transmission line  
reflection noise  
• Reduced VOH (typically=3.3V) versions of equivalent  
FCT functions  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
The FCT2646T consists of a bus transceiver circuit with  
three-state, D-type flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the input bus or  
from the internal registers. Data on the A or B bus will be  
clocked into the registers as the appropriate clock pin goes to  
a HIGH logic level. Enable Control G and direction pins are  
provided to control the transceiver function. On-chip termina-  
tion resistors have been added to the outputs to reduce system  
noise caused by reflections so that the FCT2646T can be used  
to replace the FCT646T in an existing design.  
In the transceiver mode, data present at the high impedance  
port may be stored in either the A or B register, or in both.  
Select controls can multiplex stored and real-time (transparent  
mode) data. The direction control determines which bus will  
receive data when the enable control G is Active LOW. In the  
isolation mode (enable control G HIGH), A data may be stored  
in the B register and/or B data may be stored in the A register.  
• Power-off disable feature permits live insertion  
• Matched rise and fall times  
• ESD > 2000V  
• Fully compatible with TTL input and output logic levels  
• Sink current  
12 mA  
Source current 15 mA  
The outputs are designed with a power-off disable feature to  
allow for live insertion of boards.  
• Independent register for A and B buses  
• Extended commercial temp. range of –40˚C to +85˚C  
• Three-state output  
Pin Configurations  
Functional Block Diagram  
G
QSOP  
Top View  
DIR  
CPBA  
SBA  
CPAB  
SAB  
DIR  
1
24  
23  
22  
21  
V
CC  
CPBA  
SBA  
G
2
3
CPAB  
SAB  
A
1
4
A
2
B
1
5
20  
19  
18  
17  
16  
A
3
B
2
6
A
4
B
3
7
D
C
A
5
B
4
8
A
6
B
5
9
B
6
B
7
B
8
A
7
10  
11  
12  
15  
14  
13  
A
8
GND  
B
1
FCT2646T–3  
A
1
D
C
Logic Block Diagram  
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
CPAB  
SAB  
DIR  
CPBA  
SBA  
TO 7 OTHERCHANNELS  
FCT2646T  
–1  
G
B
B
B
B
B
B
B
B
8
1
2
3
4
5
6
7
FCT2646T–4  
Copyright © 2000, Texas Instruments Incorporated  
1234567

中文翻译

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