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CY74FCT245TSOCT PDF预览

CY74FCT245TSOCT

更新时间: 2024-11-15 22:21:35
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 93K
描述
8-Bit Transceiver

CY74FCT245TSOCT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP20,.4针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:0.91
Is Samacsys:N控制类型:COMMON CONTROL
计数方向:BIDIRECTIONAL系列:FCT
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:12.8 mm逻辑集成电路类型:BUS TRANSCEIVER
最大I(ol):0.064 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TR
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):0.2 mAProp。Delay @ Nom-Sup:7 ns
传播延迟(tpd):7 ns认证状态:Not Qualified
施密特触发器:No座面最大高度:2.65 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A宽度:7.5 mm
Base Number Matches:1

CY74FCT245TSOCT 数据手册

 浏览型号CY74FCT245TSOCT的Datasheet PDF文件第2页浏览型号CY74FCT245TSOCT的Datasheet PDF文件第3页浏览型号CY74FCT245TSOCT的Datasheet PDF文件第4页浏览型号CY74FCT245TSOCT的Datasheet PDF文件第5页浏览型号CY74FCT245TSOCT的Datasheet PDF文件第6页浏览型号CY74FCT245TSOCT的Datasheet PDF文件第7页 
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY54/74FCT245T  
SCCS018 - May 1994 - Revised February 2000  
8-Bit Transceiver  
Functional Description  
Features  
Function, pinout, and drive compatible with FCT, and  
The FCT245T contains eight non-inverting bidirectional buff-  
ers with three-state outputs and is intended for bus oriented  
applications. For the FCT245T, current sinking capability is 64  
mA at the A and B ports.  
F logic  
• FCT-D speed at 3.8 ns max. (Com’l),  
FCT-C speed at 4.1 ns max. (Com’l),  
FCT-A speed at 4.6 ns max. (Com’l)  
• Reduced VOH (typically = 3.3V) versions of equivalent  
FCT functions  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
• Power-off disable feature  
The Transmit/Receiver (T/R) input determines the direction of  
data flow through bidirectional transceiver. Transmit (Active  
HIGH) enables data from A ports to B ports. The output enable  
(OE), when HIGH, disables both the A and B ports by putting  
them in a High Z condition.  
The outputs are designed with a power-off disable feature to  
allow for live insertion of boards.  
• ESD > 2000V  
• Matched rise and fall times  
• Fully compatible with TTL input and output logic levels  
• Extended commercial range of 40˚C to +85˚C  
• Sink current  
Source current  
64 mA (Com’l), 48 mA (Mil)  
32 mA (Com’l), 12 mA (Mil)  
Logic Block Diagram  
Pin Configurations  
T/R  
OE  
A
0
B
0
DIP/SOIC/QSOP  
Top View  
LCC  
A
1
Top View  
T/R  
V
CC  
1
B
B
20  
1
2
A
0
OE  
2
3
4
5
6
19  
A
2
A
1
B
0
18  
17  
16  
7
6 5 4  
8
A
A
2
B
B
B
B
B
B
B
7
1
2
3
4
5
6
7
A
9
1
3
2
1
GND  
A
0
A
3
10  
11  
A
3
B
B
7
T/R  
A
4
15  
14  
B
3
12  
13  
V
CC  
20  
19  
6
5
A
5
7
B
OE  
A
4
A
6
8
13  
12  
11  
1516 17 18  
14  
A
7
9
B
B
4
5
GND  
10  
A
5
A
6
B
B
6
7
A
7
Function Table[1]  
OE  
L
T/R  
L
Operation  
B Data to Bus A  
A Data to Bus B  
High Z State  
L
H
H
X
Note:  
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.  
Copyright © 2000, Texas Instruments Incorporated  

CY74FCT245TSOCT 替代型号

型号 品牌 替代类型 描述 数据表
CY74FCT245TSOC TI

完全替代

8-BIT TRANSCEIVERS WITH 3-STATE OUTPUTS
CY74FCT245ATPC TI

完全替代

8-BIT TRANSCEIVERS WITH 3-STATE OUTPUTS

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