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CY74FCT2373CTQCT PDF预览

CY74FCT2373CTQCT

更新时间: 2024-02-22 21:38:28
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器锁存器
页数 文件大小 规格书
6页 59K
描述
8-Bit Latches

CY74FCT2373CTQCT 技术参数

生命周期:Transferred零件包装代码:QSOP
包装说明:SSOP,针数:20
Reach Compliance Code:unknown风险等级:5.29
其他特性:POWER OFF DISABLE OUTPUTS TO PERMIT LIVE INSERTION; 25 OHM OUTPUT SERIES RESISTOR系列:FCT
JESD-30 代码:R-PDSO-G20长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
传播延迟(tpd):13 ns认证状态:Not Qualified
座面最大高度:1.75 mm最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
宽度:3.9 mmBase Number Matches:1

CY74FCT2373CTQCT 数据手册

 浏览型号CY74FCT2373CTQCT的Datasheet PDF文件第2页浏览型号CY74FCT2373CTQCT的Datasheet PDF文件第3页浏览型号CY74FCT2373CTQCT的Datasheet PDF文件第4页浏览型号CY74FCT2373CTQCT的Datasheet PDF文件第5页浏览型号CY74FCT2373CTQCT的Datasheet PDF文件第6页 
1CY74FCT2573T  
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY74FCT2373T  
CY74FCT2573T  
SCCS039 - September 1994 - Revised March 2000  
8-Bit Latches  
Features  
Functional Description  
• Functionandpinoutcompatiblewiththefastestbipolar  
logic  
• 25output series resistors to reduce transmission line  
refelection noise  
• FCT-C speed at 4.7 ns max.  
• Reduced VOH (typically=3.3V) versions of equivalent  
FCT functions  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
• Power-off disable feature  
The FCT2373T and FCT2573T are 8-bit, high-speed CMOS  
TTL-compatible buffered latches with three-state outputs that  
are ideal for driving high-capacitance loads, such as memory  
and address buffers. On-chip 25termination resistors have  
been added to the outputs to reduce system noise caused by  
reflections. FCT2373T can be used to replace FCT373T, and  
FCT2573T to replace FCT573T to reduce noise in an existing  
design.  
When latch enable (LE) is HIGH, the flip-flops appear trans-  
parent to the data. Data that meets the required set-up times  
are latched when LE transitions from HIGH to LOW. Data  
appears on the bus when the output enable (OE) is LOW.  
When output enable is HIGH, the bus output is in the high  
impedance state. In this mode, data can still be entered into  
the latches.  
• Matched rise and fall times  
• ESD > 2000V  
• Fully compatible with TTL input and output logic levels  
• Sink current  
Source current  
12 mA  
15 mA  
The outputs are designed with a power-off disable feature to  
allow for live insertion of boards.  
Extended commercial temp. range of –40˚C to +85˚C  
Logic Symbol  
Pin Configurations  
SOIC/QSOP  
Top View  
D
LE  
D
D
D
D
D
D
D
7
0
1
2
3
4
5
6
OE  
1
V
20  
19  
18  
17  
16  
CC  
O
0
O
2
3
4
5
6
7
OE  
O
0
D
0
D
7
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
1
D
6
O
1
O
6
FCT2373T  
O
2
O
5
15  
14  
13  
12  
11  
FCT2373T-1  
D
2
D
7
8
9
5
D
3
D
4
O
3
O
4
GND  
LE  
10  
FCT2373T-4  
Logic Block Diagram  
SOIC/QSOP  
Top View  
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
LE  
OE  
1
V
CC  
20  
D
0
O
0
2
19  
CP  
D
CP  
D
CP  
D
Q
CP  
D
Q
CP  
D
Q
CP  
D
CP  
D
CP  
D
D
1
O
1
3
18  
17  
16  
Q
Q
Q
Q
Q
D
2
O
2
4
D
3
O
3
5
D
4
O
4
6
15  
14  
13  
12  
11  
D
5
O
5
7
OE  
O
6
D
6
8
D
7
O
7
9
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
GND  
10  
LE  
FCT2373T-2  
FCT2373T-6  
Copyright © 2000, Texas Instruments Incorporated  

CY74FCT2373CTQCT 替代型号

型号 品牌 替代类型 描述 数据表
CY74FCT2373CTQCTG4 TI

完全替代

FCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, QSOP-20
CY74FCT2373TQCT TI

完全替代

8-Bit Latches

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