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CY74FCT163827

更新时间: 2024-11-25 22:34:43
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德州仪器 - TI /
页数 文件大小 规格书
6页 60K
描述
20-Bit Buffer

CY74FCT163827 数据手册

 浏览型号CY74FCT163827的Datasheet PDF文件第2页浏览型号CY74FCT163827的Datasheet PDF文件第3页浏览型号CY74FCT163827的Datasheet PDF文件第4页浏览型号CY74FCT163827的Datasheet PDF文件第5页浏览型号CY74FCT163827的Datasheet PDF文件第6页 
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY74FCT163827  
SCCS049 - March 1997 - Revised March 2000  
20-Bit Buffer  
Features  
Functional Description  
• Low power, pin-compatible replacement for LCX and  
LPT families  
• 5V tolerant inputs and outputs  
• 24 mA & 6 mA balanced drive outputs  
• Power-off disable outputs permits live insertion  
• Edge-rate control circuitry for reduced noise  
• FCT-C speed at 4.1 ns  
• Latch-up performance exceeds JEDEC standard no. 17  
• Typical output skew < 250 ps  
The CY74FCT163827 is a 20-bit buffer/line driver that provides  
high-performance bus interface buffering for wide data/address  
paths or buses carrying parity. It can be used as a single 20-bit  
buffer or two 10-bit buffers. Each 10-bit buffer has a pair of NANDed  
OE for increased flexibility.  
The CY74FCT163827 has 24-mA balanced output drivers  
with current limiting resistors in the outputs. This reduces the  
need for external terminating resistors and provides for  
minimal undershoot and reduced ground bounce. The inputs  
and outputs were designed to be capable of being driven by  
5.0V buses, allowing its use in mixed voltage systems as a  
translator. The outputs are also designed with a power-off  
disable feature enabling its use in applications requiring live  
insertion.  
• Industrial temperature range of –40˚C to +85˚C  
• TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)  
• TypicalV  
olp  
(groundbounce)performanceexceedsMil  
Std 883D  
• VCC = 2.7V to 3.6V  
• ESD (HBM) > 2000V  
Logic Block Diagrams CY74FCT163827  
Pin Configuration  
SSOP/TSSOP  
Top View  
OE  
1
1
OE  
56  
1
2
3
4
OE  
2
1
1
1
1
1
OE  
1
2
Y
A
A
1
1
1
55  
54  
53  
52  
1
2
Y
2
GND  
Y
GND  
A
1
3
5
1
1
3
4
Y
4
A
1
6
51  
50  
49  
48  
Y
A
1
1
1
1
V
CC  
V
CC  
7
Y
1
1
1
5
A
A
1
1
5
6
8
Y
6
9
Y
7
A
10  
11  
1
7
47  
46  
GND  
GND  
FCT163827-1  
TO 9 OTHER CHANNELS  
Y
8
1
A
A
1
1
8
9
45  
44  
43  
42  
41  
12  
13  
Y
9
1
A
Y
10  
14  
15  
16  
17  
18  
1
10  
1
Y
A
A
A
2
2
2
1
OE  
2
2
2
1
2
3
2
1
Y
2
OE  
2
2
Y
3
40  
39  
38  
37  
36  
35  
34  
GND  
Y
GND  
A
19  
20  
21  
22  
23  
2
2
2
4
2
2
2
4
5
6
Y
5
A
A
A
Y
Y
6
2
1
2
1
V
CC  
V
CC  
Y
7
A
7
2
2
2
2
Y
8
A
8
24  
25  
33  
32  
31  
GND  
Y
GND  
A
FCT163827-2  
26  
27  
28  
2
2
9
TO 9 OTHER CHANNELS  
2
2
2
9
Y
10  
A
10  
30  
29  
OE  
1
OE  
2
2
Copyright © 2000, Texas Instruments Incorporated  

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